Design security architecture for next-generation CPUs, CPU clusters and control processors. Define access-control policies, privilege models, isolation boundaries and protection mechanisms across hardware, firmware, debug resources and shared SoC systems. Collaborate with engineering teams to specify and verify secure designs, assess threats, and balance security assurance with power, performance and area requirements.
Responsibilities
- Design CPU security features to counter potential threats.
- Architect access-control policies and topologies for CPU clusters and control processors.
- Define privilege separation, authorization checks, isolation boundaries, secure boot, and debug access policies.
- Specify protection requirements for security-critical registers, memories, firmware interfaces, and shared So
- C resources.
- Collaborate with hardware and software teams to implement secure design principles.
- Conduct security assessments and recommend architectural changes.
Required Skills
- CPU security architecture
- Access-control architecture and policy design
- Privilege models and isolation boundaries
- CPU microarchitectural security threats and countermeasures
- CPU instruction set architectures such as ARM, x86, or RISC-VThreat modeling and security risk analysis
- Cryptographic algorithms and protocols
- Hardware design for CPU subcomponents
- Formal or semi-formal security verification
- Automated microarchitectural fuzzing