Advanced Micro Devices
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. THE ROLE: Be part of AMD's analog/mixed signal IP design team responsible for the design and development of next generation IOs, high speed memory (LPDDR5, DDR5, gDDR6, HBM2/HBM3, chip to chip, ) and chip to chip Gbps proprietary PHY IP solutions. Responsibilities include THE PERSON: The ideal candidate has experience leading others in technical settings. You also have excellent communication, writing, and presentation skills. KEY RESPONSIBLITIES: Definition, review and sign off on IP top level and component level specifications AMS components circuit and layout design Supervise pre silicon layout, post silicon characterization and debug. Support product bring up and debug, and Sign off on test plans and characterization reports. Interface with SOC teams, system HW/SW teams, and global manufacturing teams. PREFERRED EXPERIENCE: Experience in high speed serial and/or parallel mixed signal PHY/IO designs Strong fundamentals and knowledge of mixed signal circuit architecture and design techniques for receiver/transmitter and PLL/DLL/clocking. Hand on design experience in multi Gbps serial (PCIe, USB, ), parallel high BW memory interface PHY/IOs (DDR4/DDR5, HBM2/HBM3, gDDR5/gDDR6, ) and chip to chip links PHY IPs such as UCIe. Experience in mixed signal design circuit blocks such as digital/analog DLLs, duty cycle corrector, clock and data recovery, clock mixer, Experience in low power design techniques for high speed/custom digital circuit (e.g. CMOS/CML high speed design for counters, dividers, ) design and analysis including transistor level timing sign off Solid understanding of power, area and performance trade offs in mixed signal IP design Design Experience in FinFET advanced CMOS process nodes 7nm and below coupled with a solid understanding of transistor device performance and fundamentals Proficient in AMS design flows, tools, and methodologies. Familiar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation tools Work with project manager, system architects, IC designers and physical designers to guarantee quality/timely deliverables meeting project's schedule and technical requirements Track record of successfully taking designs to production Excellent written and verbal communication skills able to operate without direct supervision but also work cross functionally, cross geographies collaborating and being part of a multi disciplinary team in a dynamic/fast paced environment. Exhibit strong initiative and ownership of tasks and responsibilities. Seek help proactively as well as share and pass on knowledge ACADEMIC CREDENTIALS: BS, MS or PhD in Electrical Engineering, Computer Engineering or related equivalent LOCATION: San Jose, California This role is not eligible for visa sponsorship. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available. This posting is for an existing vacancy.
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. THE ROLE: Be part of AMD's analog/mixed signal IP design team responsible for the design and development of next generation IOs, high speed memory (LPDDR5, DDR5, gDDR6, HBM2/HBM3, chip to chip, ) and chip to chip Gbps proprietary PHY IP solutions. Responsibilities include THE PERSON: The ideal candidate has experience leading others in technical settings. You also have excellent communication, writing, and presentation skills. KEY RESPONSIBLITIES: Definition, review and sign off on IP top level and component level specifications AMS components circuit and layout design Supervise pre silicon layout, post silicon characterization and debug. Support product bring up and debug, and Sign off on test plans and characterization reports. Interface with SOC teams, system HW/SW teams, and global manufacturing teams. PREFERRED EXPERIENCE: Experience in high speed serial and/or parallel mixed signal PHY/IO designs Strong fundamentals and knowledge of mixed signal circuit architecture and design techniques for receiver/transmitter and PLL/DLL/clocking. Hand on design experience in multi Gbps serial (PCIe, USB, ), parallel high BW memory interface PHY/IOs (DDR4/DDR5, HBM2/HBM3, gDDR5/gDDR6, ) and chip to chip links PHY IPs such as UCIe. Experience in mixed signal design circuit blocks such as digital/analog DLLs, duty cycle corrector, clock and data recovery, clock mixer, Experience in low power design techniques for high speed/custom digital circuit (e.g. CMOS/CML high speed design for counters, dividers, ) design and analysis including transistor level timing sign off Solid understanding of power, area and performance trade offs in mixed signal IP design Design Experience in FinFET advanced CMOS process nodes 7nm and below coupled with a solid understanding of transistor device performance and fundamentals Proficient in AMS design flows, tools, and methodologies. Familiar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation tools Work with project manager, system architects, IC designers and physical designers to guarantee quality/timely deliverables meeting project's schedule and technical requirements Track record of successfully taking designs to production Excellent written and verbal communication skills able to operate without direct supervision but also work cross functionally, cross geographies collaborating and being part of a multi disciplinary team in a dynamic/fast paced environment. Exhibit strong initiative and ownership of tasks and responsibilities. Seek help proactively as well as share and pass on knowledge ACADEMIC CREDENTIALS: BS, MS or PhD in Electrical Engineering, Computer Engineering or related equivalent LOCATION: San Jose, California This role is not eligible for visa sponsorship. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available. This posting is for an existing vacancy.
Advanced Micro Devices
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Principal / Senior GPU Software Performance Engineer - Post Training THE ROLE Drive the performance of post training workloads on AMD Instinct GPUs. You'll work across kernels, distributed training, and framework integrations to deliver fast, stable, and reproducible training pipelines on ROCm. THE PERSON The ideal candidate is passionate about software engineering and the craft of training performance. You lead sophisticated cross stack issues-spanning data loaders, kernels, distributed training, and compilers-to clear resolution. You communicate crisply and collaborate effectively with framework, compiler, kernel, and model teams across AMD, driving measurable improvements with rigor, ownership, and reproducibility. KEY RESPONSIBILITIES Lead performance for finetuning and RL training solutions on AMD GPUs. Improve throughput, memory efficiency, and stability across data, model, and optimizer steps. Optimize multi GPU/multi node training and communication patterns. Contribute efficient kernels/ops and targeted graph level optimizations. Profile, diagnose, and resolve bottlenecks using standard tooling; prevent regressions in CI. Ship reproducible pipelines and documentation adopted by internal teams and external developers. Collaborate with framework, compiler, and model teams to land durable improvements. PREFERRED EXPERIENCE Proven GPU performance engineering for deep learning (ROCm/HIP, Triton, or similar). Hands on with SFT. LoRA and RL based training at scale. Strong PyTorch experience (torch.distributed, FSDP/ZeRO or equivalent). Proficient in Python and C++; comfortable reading/writing kernels when needed. Experience with distributed systems and collective communication libraries. Track record of turning profiles into fixes, upstreaming changes, and documenting results. ACADEMIC CREDENTIALS B.S./M.S./Ph.D. in Computer Science, Computer Engineering, Electrical Engineering, or equivalent LOCATION San Jose, CA preferred. Other US based locations may be considered. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Principal / Senior GPU Software Performance Engineer - Post Training THE ROLE Drive the performance of post training workloads on AMD Instinct GPUs. You'll work across kernels, distributed training, and framework integrations to deliver fast, stable, and reproducible training pipelines on ROCm. THE PERSON The ideal candidate is passionate about software engineering and the craft of training performance. You lead sophisticated cross stack issues-spanning data loaders, kernels, distributed training, and compilers-to clear resolution. You communicate crisply and collaborate effectively with framework, compiler, kernel, and model teams across AMD, driving measurable improvements with rigor, ownership, and reproducibility. KEY RESPONSIBILITIES Lead performance for finetuning and RL training solutions on AMD GPUs. Improve throughput, memory efficiency, and stability across data, model, and optimizer steps. Optimize multi GPU/multi node training and communication patterns. Contribute efficient kernels/ops and targeted graph level optimizations. Profile, diagnose, and resolve bottlenecks using standard tooling; prevent regressions in CI. Ship reproducible pipelines and documentation adopted by internal teams and external developers. Collaborate with framework, compiler, and model teams to land durable improvements. PREFERRED EXPERIENCE Proven GPU performance engineering for deep learning (ROCm/HIP, Triton, or similar). Hands on with SFT. LoRA and RL based training at scale. Strong PyTorch experience (torch.distributed, FSDP/ZeRO or equivalent). Proficient in Python and C++; comfortable reading/writing kernels when needed. Experience with distributed systems and collective communication libraries. Track record of turning profiles into fixes, upstreaming changes, and documenting results. ACADEMIC CREDENTIALS B.S./M.S./Ph.D. in Computer Science, Computer Engineering, Electrical Engineering, or equivalent LOCATION San Jose, CA preferred. Other US based locations may be considered. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.