Celero Communications, Inc.

Principal Agentic AI Engineer Analog Design Automation Location: San Jose, CA or fully remote from any US location Job Summary We are seeking an experienced AI/ML Technical Leader to drive the development of next-generation AI-powered automation solutions for analog semiconductor design. This role combines deep expertise in analog custom layout, parasitic extraction, physical verification and simulation with modern Large Language Models (LLMs), agentic AI architectures, and software engineering. The ideal candidate will lead the design and implementation of intelligent AI agents that automate complex analog design and verification workflows, improve engineering productivity, and integrate seamlessly with existing EDA environments. This position requires a unique combination of semiconductor domain expertise, AI/ML knowledge, and software development experience. Key Responsibilities Design, develop, and deploy agentic AI workflows that automate analog semiconductor design and verification processes. Build AI agents leveraging existing Large Language Models (LLMs) to improve engineering productivity across analog development flows. Develop reusable AI Skills, MCP (Model Context Protocol) tools, and workflow orchestration components with an emphasis on efficient token utilization, context management, and scalability. Collaborate with analog design, layout, and physical verification teams to identify automation opportunities and deliver production-ready AI solutions. Develop robust software using Python and modern DevOps practices, including CI/CD pipelines, workflow automation, and version-controlled development. Integrate AI solutions with EDA environments using Tcl, Python, Rust and other scripting languages. Optimize AI workflows for performance, reliability, security, and cost efficiency. Lead architecture discussions and mentor engineers on AI-driven semiconductor automation technologies. Stay current with advances in Generative AI, LLMs, Agentic AI, and semiconductor design automation. Required Qualifications Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline. 8+ years of experience in analog semiconductor development workflow automation. 8+ years of experience in physical verification, including signoff verification methodologies. 8+ years of experience developing high-speed analog custom layouts. Proven experience designing and implementing agentic AI workflows using existing Large Language Models (LLMs). Experience developing AI Skills, MCP tools, and agent orchestration frameworks with efficient token utilization strategies. Strong programming skills in Python. Experience with DevOps methodologies, CI/CD pipelines, software engineering best practices, and version control systems. Strong scripting experience using Tcl. Thorough understanding of: - Analog floorplanning - Device matching and analog layout techniques - EM/IR analysis and power planning - Parasitic RC extraction and tradeoff analysis - High-speed analog design methodologies - Simulation methods Preferred Qualifications Experience integrating AI solutions with commercial EDA tools such as Cadence, Synopsys, or Siemens EDA. Experience with Retrieval-Augmented Generation (RAG), vector databases, and AI knowledge management systems. Familiarity with Model Context Protocol (MCP) architecture and AI tool development. Experience deploying AI applications on cloud or hybrid computing platforms. Knowledge of modern LLM frameworks such as LangGraph, LangChain, Semantic Kernel, CrewAI, or AutoGen. Experience building production-grade AI systems with observability, monitoring, evaluation, and governance. Technical Skills Agentic AI Large Language Models (LLMs) MCP (Model Context Protocol) Python Tcl Rust DevOps and CI/CD Workflow orchestration Analog Custom Layout workflow Analog Design workflow