Vortexlink
Saratoga, California
06/07/2026
Full time
RTL Engineer, Networking ASIC Full Time opportunity in Saratoga, CA We are seeking experienced RTL designers to help define and implement our industry-leading Networking ASIC's. If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking. As part of the Design Group, you will be responsible for defining, specifying, architecting, executing, and productizing cutting-edge Networking chips.