Efficient Computer
San Francisco, California
If you are an ASIC Physical Design Engineer who wants to impact the transformation of the next evolution of computing, we would like to talk to you. Efficient is hiring a senior ASIC Physical Design Engineer with experience in backend implementation from Netlist to GDSII. We seek individuals to leverage low power techniques and design-technology co optimization in advanced technology nodes to build energy efficient SoCs. This is a unique opportunity to get in at the ground level and have influence on our products as we move from initial stages of product development to market release and scaled volume production. Join our team and help us shape the future of computing at the edge and beyond! Key Responsibilities Take ownership of the physical design of multi-hierarchy low-power designs in advanced technology nodes. This includes executing physical-aware logical synthesis, floor planning, place and route, clock tree synthesis, static timing analysis, ERC, IR drop analysis, electromagnetic analysis, and physical verification. Analyze, debug and fix placement-, cts-, routing-, and buffering- related design and flow issues, using semi-custom placement, route guides and other tool directives via scripts to converge design to PPA targets. Own and deliver designs meeting sign-off timing targets (setup/hold across multiple corners with OCV derating) within specified power envelope while managing constraints (sdc). Lead the integration of the partition/IP, analyze port, feedthrough, macro placements, review DRV, LVS, IR violations and adjust collateral for clean integration. Engage with the digital design team to understand the architecture to address congestion and timing issues through design modifications and functional Engineering Change Orders (ECOs). Engage with the DFT team to plan and provide early feedback on design decisions that relate to physical implementation. Create scripts for EDA tools to automate tasks and enhance the throughput and quality of the physical design process. Required Qualifications Master's degree in Electrical Engineering with 5+ years of industry experience or PhD in Electrical Engineering with 3+ years of industry experience. Proven track record of delivering block (or SoC) RTL2GDSII for multiple tape-outs in 22nm or below process technologies. Experience with EDA flow using Cadence/Synopsys/Mentor tools for front end (Synthesis/LEC), back end (Place and Route), and verification/simulation (Physical Verification) with hierarchical design and abstraction techniques. Hands-on experience in place & route, power and clock-tree implementation, and timing convergence of high-frequency designs. Knowledge of static timing analysis, defining constraints and exceptions, corners/voltage definitions. Experience with low power implementation typical in industry, including advanced knowledge of UPF standard (IEEE-1801). Excellent scripting skills in TCL, Bash and python. Preferred Qualifications Experience in full chip floor planning, partitioning, budgeting, and power grid planning. Knowledge of circuit design, device physics, deep sub-micron technology, and SOI technology and its implications to physical design. Proficiency with industry-grade physical design flow and hands-on building CAD flow infrastructure for PD engineers. Knowledge of design constraints for static timing analysis (synthesis, pre/post cts, sign off) and corners/voltage definitions. Experience in validating Power Distribution Networks from package to pg grid, IR/EM: static and dynamic. Experience in integrating analog or mixed-signal macro on top-level design. About Efficient: Efficient is developing the world's most energy-efficient general-purpose computer processor. Efficient's patented technology uses 100x less energy than state of the art commercially available ultra-low-power processors and is programmable using standard high-level programming languages and AI/ML frameworks. This level of efficiency makes perpetual, pervasive intelligence possible: run AI/ML continuously on a AA battery for 5-10 years. Our platform's unprecedented level of efficiency enables IoT devices to intelligently capture and curate first-party data to drive the next major computing revolution. Efficient was established in 2022 as a spinout of Carnegie Mellon University and is currently building a world-class team of hardware and software engineers spanning from silicon implementation to compilers. With seed funding secured, a portfolio of patent-protected IP, and substantial progress on hardware and software development, Efficient delivered first silicon in mid-2024. Find out more about our story at Working at Efficient: We are a small, but mighty team, with team members spread across EffHQ in Pittsburgh, Silicon Valley, and New York City. We are a young company on a tremendous growth path. We aim to bring our team together, in-person often and camaraderie is key to our success. We have the tools and technology to keep us together and interactive as a remote team, as well. We are dedicated to our core values: Adventure, Teamliness, Excellence, Impact, Determination, Integrity. Our core values define who we are as people, as a team and as a company and they are prevalent throughout our meetings, interactions, and culture. Efficient offers a competitive compensation and benefits package, including 401K match, company-paid benefits, equity program, paid parental leave, flexibility, and more! We are committed to personal and professional development and strive to grow together as people and as a company. Seniority level Mid-Senior level Employment type Full-time Job function Industries: Computer Hardware Manufacturing and Semiconductor Manufacturing
If you are an ASIC Physical Design Engineer who wants to impact the transformation of the next evolution of computing, we would like to talk to you. Efficient is hiring a senior ASIC Physical Design Engineer with experience in backend implementation from Netlist to GDSII. We seek individuals to leverage low power techniques and design-technology co optimization in advanced technology nodes to build energy efficient SoCs. This is a unique opportunity to get in at the ground level and have influence on our products as we move from initial stages of product development to market release and scaled volume production. Join our team and help us shape the future of computing at the edge and beyond! Key Responsibilities Take ownership of the physical design of multi-hierarchy low-power designs in advanced technology nodes. This includes executing physical-aware logical synthesis, floor planning, place and route, clock tree synthesis, static timing analysis, ERC, IR drop analysis, electromagnetic analysis, and physical verification. Analyze, debug and fix placement-, cts-, routing-, and buffering- related design and flow issues, using semi-custom placement, route guides and other tool directives via scripts to converge design to PPA targets. Own and deliver designs meeting sign-off timing targets (setup/hold across multiple corners with OCV derating) within specified power envelope while managing constraints (sdc). Lead the integration of the partition/IP, analyze port, feedthrough, macro placements, review DRV, LVS, IR violations and adjust collateral for clean integration. Engage with the digital design team to understand the architecture to address congestion and timing issues through design modifications and functional Engineering Change Orders (ECOs). Engage with the DFT team to plan and provide early feedback on design decisions that relate to physical implementation. Create scripts for EDA tools to automate tasks and enhance the throughput and quality of the physical design process. Required Qualifications Master's degree in Electrical Engineering with 5+ years of industry experience or PhD in Electrical Engineering with 3+ years of industry experience. Proven track record of delivering block (or SoC) RTL2GDSII for multiple tape-outs in 22nm or below process technologies. Experience with EDA flow using Cadence/Synopsys/Mentor tools for front end (Synthesis/LEC), back end (Place and Route), and verification/simulation (Physical Verification) with hierarchical design and abstraction techniques. Hands-on experience in place & route, power and clock-tree implementation, and timing convergence of high-frequency designs. Knowledge of static timing analysis, defining constraints and exceptions, corners/voltage definitions. Experience with low power implementation typical in industry, including advanced knowledge of UPF standard (IEEE-1801). Excellent scripting skills in TCL, Bash and python. Preferred Qualifications Experience in full chip floor planning, partitioning, budgeting, and power grid planning. Knowledge of circuit design, device physics, deep sub-micron technology, and SOI technology and its implications to physical design. Proficiency with industry-grade physical design flow and hands-on building CAD flow infrastructure for PD engineers. Knowledge of design constraints for static timing analysis (synthesis, pre/post cts, sign off) and corners/voltage definitions. Experience in validating Power Distribution Networks from package to pg grid, IR/EM: static and dynamic. Experience in integrating analog or mixed-signal macro on top-level design. About Efficient: Efficient is developing the world's most energy-efficient general-purpose computer processor. Efficient's patented technology uses 100x less energy than state of the art commercially available ultra-low-power processors and is programmable using standard high-level programming languages and AI/ML frameworks. This level of efficiency makes perpetual, pervasive intelligence possible: run AI/ML continuously on a AA battery for 5-10 years. Our platform's unprecedented level of efficiency enables IoT devices to intelligently capture and curate first-party data to drive the next major computing revolution. Efficient was established in 2022 as a spinout of Carnegie Mellon University and is currently building a world-class team of hardware and software engineers spanning from silicon implementation to compilers. With seed funding secured, a portfolio of patent-protected IP, and substantial progress on hardware and software development, Efficient delivered first silicon in mid-2024. Find out more about our story at Working at Efficient: We are a small, but mighty team, with team members spread across EffHQ in Pittsburgh, Silicon Valley, and New York City. We are a young company on a tremendous growth path. We aim to bring our team together, in-person often and camaraderie is key to our success. We have the tools and technology to keep us together and interactive as a remote team, as well. We are dedicated to our core values: Adventure, Teamliness, Excellence, Impact, Determination, Integrity. Our core values define who we are as people, as a team and as a company and they are prevalent throughout our meetings, interactions, and culture. Efficient offers a competitive compensation and benefits package, including 401K match, company-paid benefits, equity program, paid parental leave, flexibility, and more! We are committed to personal and professional development and strive to grow together as people and as a company. Seniority level Mid-Senior level Employment type Full-time Job function Industries: Computer Hardware Manufacturing and Semiconductor Manufacturing
Efficient Computer
2 days ago Be among the first 25 applicants Get AI-powered advice on this job and more exclusive features. Efficient is developing the world's most energy-efficient general-purpose computer processor. Efficient's patented technology uses 100x less energy than state of the art commercially available ultra-low-power processors and is programmable using standard high-level programming languages and AI/ML frameworks. This level of efficiency makes perpetual, pervasive intelligence possible: run AI/ML continuously on a AA battery for 5-10 years. Our platform's unprecedented level of efficiency enables IoT devices to intelligently capture and curate first-party data to drive the next major computing revolution We are seeking an experienced and highly organized Vendor Manager/Technical Project Manager to oversee relationships and projects with our external vendors, while collaborating closely with internal hardware teams. This individual will play a critical role in managing multiple hardware development projects in a highly cross-functional environment which includes internal customers, external vendors and technology partners. The ideal candidate has strong knowledge of the semiconductor hardware development processes, exceptional organizational skills, and a proven ability to work with vendors and stakeholders to ensure successful project execution. This role will operate in effectively in a fast-paced, dynamic environment with shifting priorities and emerging challenges. Key Responsibilities Vendor Relationship Management Facilitate the vendor selection and due diligence process including defining requirements, issuing RFIs/RFPs/SOWs, evaluating vendor capabilities, and coordinating technical and commercial reviews. This also includes contract negotiations, establish vendor relationships, and ensuring alignment on deliverables, timelines, quality standards. Be the liaison between external vendors and internal stakeholders, running point on all day-to-day vendor communication, deliverables and updates, ensuring vendors are on time with their commitments and in line with requirements. Partner with external vendors to ensure product and project components are delivered on time, in accordance with SOWs, and meet quality standards. Project Coordination & Delivery Foster a culture of accountability and transparency by regularly communicating with executive and engineering leaders on project status, risks, and opportunities. Prepare project plans and drive projects from conception and planning through implementation, production, and validation. Participate in the development of strategies, processes and identification of needed resources. Assess, evaluate risks, and drive projects forward with an eye for critical path. Identify bottlenecks and remove obstacles for the team. Cross-Functional Collaboration Establish and maintain a strong relationship with and communication between Program/Product Management, Engineering, Production Control, and Supply Chain, as well as with external vendors supporting these teams to drive execution. Articulate and present execution plans for internal leadership as well as external customers. Hold regular meetings between functional groups to ensure interdependencies are well understood and documented. Leverage technical understanding of hardware, ASIC, and software integration to facilitate cross-disciplinary communication and resolution of technical issues. Process Improvement Support roadmap development by detailing upcoming requirement changes and resources required. Identify risks proactively and develop mitigation strategies to minimize impact on project timelines and quality. Optimize engineering and operational efficiency by continuously refining program management processes. Establish and track key performance indicators (KPIs) to monitor progress, success, and strategic alignment. Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, or related field; Master's preferred. 5+ years of experience in semiconductor hardware development, vendor management, or program management. Strong understanding of hardware design flows, especially in physical design, verification, validation, and digital design. Experience negotiating contracts (i.e.: services contracts, IP engagements, foundries, qualification vendors, etc.) and writing technical SOWs and RFPs. Proven experience managing multiple projects with multiple external vendors and cross-functional internal teams. Excellent organizational, communication, and negotiation skills. Familiarity with program management and sprint planning tools (e.g., Jira, Confluence, MS Project, or equivalent). PMP or similar project management certification is a plus. Preferred Attributes Experience in semiconductor design service vendor ecosystems. Ability to work in a fast-paced, dynamic environment with multiple priorities. Strong analytical and problem-solving skills. Track record of building collaborative and high-trust relationships with internal and external partners. We offer a competitive salary for this role, generally ranging from $160,000 to $200,000, along with meaningful equity and comprehensive benefits. The final compensation package will be based on your experience and location, with some flexibility to ensure we align with the right candidate. Why Join Efficient? Efficient offers a competitive compensation and benefits package , including 401K match, company-paid benefits, equity program, paid parental leave, and flexibility . We are committed to personal and professional development and strive to grow together as people and as a company.Seniority level Seniority levelNot Applicable Employment type Employment typeFull-time Job function IndustriesTechnical and Vocational Training and Education Referrals increase your chances of interviewing at Efficient Computer by 2x Get notified about new Vendor Manager jobs in San Jose, CA . Program Manager I, Launch Operations, Platforms and Devices Mountain View, CA $105,000.00-$151,000.00 1 week ago Senior Program Manager II, Talent Strategic Initiatives Sunnyvale, CA $134,000.00-$218,000.00 1 week ago Sunnyvale, CA $134,000.00-$196,000.00 1 week ago Sunnyvale, CA $167,000.00-$230,000.00 1 week ago San Jose, CA $97,000.00-$117,000.00 2 weeks ago Mountain View, CA $134,000.00-$221,000.00 2 weeks ago San Jose, CA $110,222.00-$202,666.00 2 weeks ago San Jose, CA $137,500.00-$236,500.00 2 months ago San Jose, CA $80,000.00-$90,000.00 1 week ago Program Manager- Supportive Living ServicesAssociate Project Manager - Full Time - Onsite Role (US Citizen or Green Card Holders Only)Strategy and Operations Program Manager, Advanced Energy Sunnyvale, CA $174,000.00-$258,000.00 6 days ago San Jose, CA $110,000.00-$140,000.00 4 days ago Mountain View, CA $123,719.96-$167,385.92 2 weeks ago We're unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
2 days ago Be among the first 25 applicants Get AI-powered advice on this job and more exclusive features. Efficient is developing the world's most energy-efficient general-purpose computer processor. Efficient's patented technology uses 100x less energy than state of the art commercially available ultra-low-power processors and is programmable using standard high-level programming languages and AI/ML frameworks. This level of efficiency makes perpetual, pervasive intelligence possible: run AI/ML continuously on a AA battery for 5-10 years. Our platform's unprecedented level of efficiency enables IoT devices to intelligently capture and curate first-party data to drive the next major computing revolution We are seeking an experienced and highly organized Vendor Manager/Technical Project Manager to oversee relationships and projects with our external vendors, while collaborating closely with internal hardware teams. This individual will play a critical role in managing multiple hardware development projects in a highly cross-functional environment which includes internal customers, external vendors and technology partners. The ideal candidate has strong knowledge of the semiconductor hardware development processes, exceptional organizational skills, and a proven ability to work with vendors and stakeholders to ensure successful project execution. This role will operate in effectively in a fast-paced, dynamic environment with shifting priorities and emerging challenges. Key Responsibilities Vendor Relationship Management Facilitate the vendor selection and due diligence process including defining requirements, issuing RFIs/RFPs/SOWs, evaluating vendor capabilities, and coordinating technical and commercial reviews. This also includes contract negotiations, establish vendor relationships, and ensuring alignment on deliverables, timelines, quality standards. Be the liaison between external vendors and internal stakeholders, running point on all day-to-day vendor communication, deliverables and updates, ensuring vendors are on time with their commitments and in line with requirements. Partner with external vendors to ensure product and project components are delivered on time, in accordance with SOWs, and meet quality standards. Project Coordination & Delivery Foster a culture of accountability and transparency by regularly communicating with executive and engineering leaders on project status, risks, and opportunities. Prepare project plans and drive projects from conception and planning through implementation, production, and validation. Participate in the development of strategies, processes and identification of needed resources. Assess, evaluate risks, and drive projects forward with an eye for critical path. Identify bottlenecks and remove obstacles for the team. Cross-Functional Collaboration Establish and maintain a strong relationship with and communication between Program/Product Management, Engineering, Production Control, and Supply Chain, as well as with external vendors supporting these teams to drive execution. Articulate and present execution plans for internal leadership as well as external customers. Hold regular meetings between functional groups to ensure interdependencies are well understood and documented. Leverage technical understanding of hardware, ASIC, and software integration to facilitate cross-disciplinary communication and resolution of technical issues. Process Improvement Support roadmap development by detailing upcoming requirement changes and resources required. Identify risks proactively and develop mitigation strategies to minimize impact on project timelines and quality. Optimize engineering and operational efficiency by continuously refining program management processes. Establish and track key performance indicators (KPIs) to monitor progress, success, and strategic alignment. Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, or related field; Master's preferred. 5+ years of experience in semiconductor hardware development, vendor management, or program management. Strong understanding of hardware design flows, especially in physical design, verification, validation, and digital design. Experience negotiating contracts (i.e.: services contracts, IP engagements, foundries, qualification vendors, etc.) and writing technical SOWs and RFPs. Proven experience managing multiple projects with multiple external vendors and cross-functional internal teams. Excellent organizational, communication, and negotiation skills. Familiarity with program management and sprint planning tools (e.g., Jira, Confluence, MS Project, or equivalent). PMP or similar project management certification is a plus. Preferred Attributes Experience in semiconductor design service vendor ecosystems. Ability to work in a fast-paced, dynamic environment with multiple priorities. Strong analytical and problem-solving skills. Track record of building collaborative and high-trust relationships with internal and external partners. We offer a competitive salary for this role, generally ranging from $160,000 to $200,000, along with meaningful equity and comprehensive benefits. The final compensation package will be based on your experience and location, with some flexibility to ensure we align with the right candidate. Why Join Efficient? Efficient offers a competitive compensation and benefits package , including 401K match, company-paid benefits, equity program, paid parental leave, and flexibility . We are committed to personal and professional development and strive to grow together as people and as a company.Seniority level Seniority levelNot Applicable Employment type Employment typeFull-time Job function IndustriesTechnical and Vocational Training and Education Referrals increase your chances of interviewing at Efficient Computer by 2x Get notified about new Vendor Manager jobs in San Jose, CA . Program Manager I, Launch Operations, Platforms and Devices Mountain View, CA $105,000.00-$151,000.00 1 week ago Senior Program Manager II, Talent Strategic Initiatives Sunnyvale, CA $134,000.00-$218,000.00 1 week ago Sunnyvale, CA $134,000.00-$196,000.00 1 week ago Sunnyvale, CA $167,000.00-$230,000.00 1 week ago San Jose, CA $97,000.00-$117,000.00 2 weeks ago Mountain View, CA $134,000.00-$221,000.00 2 weeks ago San Jose, CA $110,222.00-$202,666.00 2 weeks ago San Jose, CA $137,500.00-$236,500.00 2 months ago San Jose, CA $80,000.00-$90,000.00 1 week ago Program Manager- Supportive Living ServicesAssociate Project Manager - Full Time - Onsite Role (US Citizen or Green Card Holders Only)Strategy and Operations Program Manager, Advanced Energy Sunnyvale, CA $174,000.00-$258,000.00 6 days ago San Jose, CA $110,000.00-$140,000.00 4 days ago Mountain View, CA $123,719.96-$167,385.92 2 weeks ago We're unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.