Gyga Force

Our client develops specialized semiconductor solutions for the edge, building processors capable of running AI workloads alongside bandwidth intensive sensors and wireless platforms. Their systems are designed to interpret and analyze RF data in ways that were not previously possible. They are seeking a Senior SoC RTL Design Engineer to lead chip top RTL development and integration, ensuring that all IPs, subsystems, and hard macros come together cleanly in the final SoC. Responsibilities include RTL implementation, developing synthesis constraints, designing the I/O pad ring, evaluating power and thermal behavior, and working with physical design to support timing closure and overall system optimization. This role requires strong experience in SoC architecture, RTL design, synthesis, timing, and physical implementation, and requires collaboration with DFT, PD, power/IR, and packaging teams. RESPONSIBILITIES Lead top level RTL development and integration, ensuring subsystems, IP blocks, and hard macros function correctly together. Integrate internal and third party IPs, including processor cores, analog components, memory blocks, and interface peripherals. Coordinate with subsystem owners to maintain a modular, synthesis friendly RTL structure. Design the SoC pad ring and integrate major hard macros such as PLLs, PMUs, SRAMs, and PHYs. Define high level strategies for power domain partitioning and ESD protection. Establish SoC timing and synthesis constraints and work with physical design on floor planning and implementation. Drive timing closure efforts and ensure reliable handling of clock domain crossings and reset schemes. Support power integrity and thermal analysis in collaboration with PD and packaging teams, including IR drop mitigation and package level noise considerations. Work with DFT engineering to integrate scan chains, BIST logic, and JTAG structures at the chip level. Assist with test strategy validation and support post silicon bring up and debugging. QUALIFICATIONS 7+ years of experience working on RTL design, integration, and SoC level implementation. Strong background in SystemVerilog and hardware description languages for large, complex digital designs. Experience assembling chip level components, including third party IPs, hard macros, and mixed signal interfaces. Good understanding of clocking structures, clock domain and reset domain crossing concepts. Hands on work with timing and synthesis constraints, static timing analysis, and closing timing on full chip designs. Familiarity with major EDA tools used for synthesis, timing, and implementation (Design Compiler, Genus, PrimeTime, Tempus, etc.). Ability to work with physical design teams on floor planning discussions and power/thermal considerations. Understanding of power delivery networks, IR drop behavior, and basic package level limitations. Exposure to DFT concepts such as scan, built in self test, and ATPG workflows. Strong analytical and debugging skills, with the ability to collaborate across multiple engineering groups. Degree in electrical engineering, computer engineering, computer science, or a related technical field (advanced degrees welcome). INCENTIVES & BENEFITS Equity 401(k) w/ 3% Match Comprehensive medical, dental, vision, and life insurance PTO and paid holidays Relocation Assistance H1B Visa Sponsorship (Transfers only)

Sr. Electronics Hardware Design Engineer Our client, a very financially stable San Francisco-based company in business for over 40 years, designs and manufactures high-precision electronic systems for aerospace, defense, scientific, and industrial applications. They are seeking an experienced Electronics Design Engineer with a strong background in embedded systems. In this role, you'll lead the design and development of advanced instrumentation electronics while supporting complex projects and helping oversee the engineering group. RESPONSIBILITIES Design board-level analog and digital circuits Define system requirements and specifications Design and document hardware architectures Contribute to and supervise projects involving embedded firmware and FPGA development Mentor junior engineers and technicians Write comprehensive design and product documentation Draft and refine standard operating procedures Participate in design reviews and provide technical recommendations Suggest improvements to enhance system performance and features, including input for business development initiatives Develop and implement production test strategies and programs REQUIRED QUALIFICATIONS B.S. or higher in electrical engineering (or equivalent) with a strong grasp of fundamental engineering principles 5+ years of relevant industry experience Proven expertise in analog circuit design and analysis, including power supply and instrumentation systems Hands on experience with digital design and system analysis Proficiency with schematic capture and knowledge of PCB layout (using PADS or similar tools) Must be a U.S. citizen or permanent resident (no H1B) Understanding of signal processing and control theory (linear, classical, and non linear) Some FPGA experience or knowledge, ideally with VHDL Experience or good understanding of embedded systems programming in C/C++ Familiarity with embedded Linux or real time operating systems such as FreeRTOS Experience in analog/mixed signal and data acquisition designs Background in team leadership or mentoring of junior staff INCENTIVES & BENEFITS Base Salary to $200K+ Bi-Annual Bonus Comprehensive health, dental, vision, and life insurance coverage 401(k) plan with company contribution PTO and paid U.S. holidays Relocation assistance For a list of all our openings, please visit Seniority level Mid Senior level Employment type Full time Job function IT Services and IT Consulting and Electrical Equipment Manufacturing