Chelsea Search Group

Senior ASIC Systems Engineer Minneapolis, MN (onsite/hybrid) US Citizen or US Permanent Resident Full-Time + Health Benefits + 401K Plan with profit sharing + PTO + Stock Option Plan Job Description: The Senior ASIC Systems Engineer serves as the primary technical bridge between customers and the internal ASIC design team. This role is responsible for translating complex customer requirements into comprehensive, actionable specifications that guide the architecture, RTL development, and verification processes. With extensive experience in ASIC design flows, the engineer ensures solutions meet performance, power, cost, and schedule objectives while maintaining high levels of customer engagement and satisfaction. Duties and Responsibilities: Customer Engagement: Serve as a key technical liaison with customers to capture requirements, clarify technical needs, and provide design updates throughout the project Design Coordination: Work closely with verification, physical design, and firmware teams to ensure successful implementation of specifications. Documentation & Traceability: Develop and maintain requirements documentation, traceability matrices, and change management records. Process Improvement: Contribute to improving requirements management, specification standards, and communication workflows across projects. Requirements Translation: Analyze customer product requirements and translate them into detailed ASIC functional specifications, block diagrams, and interface definitions. Risk & Trade-Off Analysis: Identify potential design risks and work with stakeholders to make informed trade-offs. Systems-Level Design: Collaborate with architects and RTL designers to ensure specifications align with performance, power, and area targets. lifecycle. Required Qualifications: BSEE/MSEE with 10+ years of experience in ASIC/SoC development with significant exposure to systems engineering and requirements management. Excellent communication skills with the ability to present complex technical topics to diverse audiences. Experience with requirements management tools (e.g., DOORS, Jama Connect, Polarion) and version control systems. Proven ability to work directly with customers to define requirements and resolve technical issues. Strong problem-solving and decision-making skills with experience balancing performance, power, cost, and schedule constraints. Strong understanding of digital logic design, ASIC/SoC architecture, and RTL coding (Verilog/VHDL). Javier Leon removed)

Low Power Design Engineer Duration: 12+ months Hourly: W2/1099/Corp-to-Corp US Citizen or US Permanent Resident only Locations: San Diego, Irvine or San Jose (onsite/no hybrid) You will work with Architects and Logic Designers to understand the power requirements and define power specifications/UPF. Support UPF for design/DV/implementation teams and verify and signoff low power intent using VCLP tool. Work closely with design, DV, implementation teams to define low power vectors, generate early and signoff power data using PTPX. Analyze power data and work closely with PD and design team to optimize for low power and improve overall PPA. Support in enhancing low power flows, work with tool vendors to address any power-related tool or flow issues. Hands-on skills in one of the scripting languages, Shell/TCL/Perl/Python. Javier Leon removed)