6 jobs found

Job Description At Boeing, we innovate and collaborate to make the world a better place. We're committed to fostering an environment for every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us. Boeing Defense Space & Security (BDS) is seeking a Senior Design and Analysis Engineer to serve the Air Dominance program in Berkeley, MO. Position Responsibilities: Leads work with customers to develop and document complex electronic and electrical system requirements Leads and coordinates work to analyze and translate requirements into system architecture, hardware and software designs, and interface specifications Leads work to test and validate to ensure system designs meet operational and functional requirements Oversees the team that monitors supplier performance to ensure system integration and compliance with requirements Solves problems and provides other support of fielded hardware and software over the entire product lifecycle Researches technology advances for potential application to company business needs Makes recommendations for technology investments Basic Qualifications (Required Skills and Experience): Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement 9+ years of related work experience and a bachelor's degree or an equivalent combination of related work experience and technical education Preferred Qualifications (Desired Skills and Experience): Experience in Open Mission Systems (OMS) development Experience in Model Based System Engineering (MBSE) development Familiarity with Universal Command and Control Interface (UCI) message standard and Common Abstraction Layer (CAL) Experience with system design and development, including component interactions, interfaces, and overall system functionality Experience with requirements development and management, including technical performance specification and statement of work development. Experience with NSA C2 and NCDSMO interactions and certification processes Experience with multi-level Security Networks Experience with multi-level Security Embedded Systems Experience with Cryptographic units, Cross Domain Solutions/Guards including access CDS and transfer CDS Knowledge of 3U and 6U VPX/OpenVPX architectures: This includes the VITA 46 and VITA 65 standards, appreciating the distinct advantages and trade-offs of each form factor in terms of size, weight, power (SWaP), processing capability, and I/O density. Knowledge of Signal Integrity & Interconnect: Expertise in high-speed digital signal design, including impedance matching, managing signal integrity, and utilizing advanced interconnect solutions like VPX3's discrete coaxial/twinax cabling is highly valued Experience with High-Performance Embedded Computing (HPEC): How to integrate and optimize performance for demanding workloads within the constraints of 3U and 6U form factors Experience with hardware design and development, encompassing all phases of the product lifecycle from initial design to flight maturity Experience with hardware-in-the-loop (HIL) simulations and testing methodologies to verify system functionality Experience with designing secure architectures, implementing cryptographic protocols, secure boot processes, firmware validation, and secure communications Experience with Open Architecture Standards: Familiarity with standards like SOSA (Sensor Open Systems Architecture), which leverages VPX standards Experience with Mezzanine Card Utilization: Understanding how mezzanine cards (e.g., XMC) can enhance functionality and scalability within 3U and 6U VPX systems Experience with 3U/6U FPGAs, GPU, and CPUs Conflict of Interest: Successful candidates for this job must satisfy the Company's Conflict of Interest (COI) assessment process. Relocation: This position offers relocation based on candidate eligibility. Note: Basic relocation will be offered for eligible internal candidates. Drug Free Workplace: Boeing is a Drug Free Workplace (DFW) where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies. The Boeing 401(k) helps you save for your future, with contributions from Boeing that can help you grow your retirement savings. Our best-in-class retirement benefit features: Best in class 401(k) plan: we'll match your contributions dollar for dollar, up to 10% of eligible pay with Immediate 100% vesting Student Loan Match: The Boeing 401(k) Student Loan Match allows eligible enrolled U.S. employees to have their qualified student loan debt payments counted, along with any match-eligible contributions they make, for purposes of determining the Company Match to employees' Boeing 401(k) accounts. Pay & Benefits: At Boeing, we strive to deliver a Total Rewards package that will attract, engage and retain the top talent. Elements of the Total Rewards package include competitive base pay and variable compensation opportunities. The Boeing Company also provides eligible employees with an opportunity to enroll in a variety of benefit programs, generally including health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance programs, and a number of programs that provide for both paid and unpaid time away from work. The specific programs and options available to any given employee may vary depending on eligibility factors such as geographic location, date of hire, and the applicability of collective bargaining agreements. Pay is based upon candidate experience and qualifications, as well as market and business considerations. Summary pay range: $136,850-$185,150 Applications for this position will be accepted until Apr. 10, 2026 Export Control Requirements: This position must meet U.S. export control compliance requirements. To meet U.S. export control compliance requirements, a "U.S. Person" as defined by 22 C.F.R. 120.62 is required. "U.S. Person" includes U.S. Citizen, U.S. National, lawful permanent resident, refugee, or asylee. Export Control Details: US based job, US Person required Education Bachelor's Degree or Equivalent Required Relocation This position offers relocation based on candidate eligibility. Security Clearance This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim U.S. Secret Clearance Pre-Start and final U.S. Secret Clearance Post-Start is required. Visa Sponsorship Employer will not sponsor applicants for employment visa status. Shift This position is for 1st shift Equal Opportunity Employer: Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military/veteran status or other characteristics protected by law.

Job Description At Boeing, we innovate and collaborate to make the world a better place. We're committed to fostering an environment for every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us. Boeing Defense Space & Security (BDS) is seeking a Senior Design and Analysis Engineer to serve the Air Dominance program in Berkeley, MO. Position Responsibilities: Leads work with customers to develop and document complex electronic and electrical system requirements Leads and coordinates work to analyze and translate requirements into system architecture, hardware and software designs, and interface specifications Leads work to test and validate to ensure system designs meet operational and functional requirements Oversees the team that monitors supplier performance to ensure system integration and compliance with requirements Solves problems and provides other support of fielded hardware and software over the entire product lifecycle Researches technology advances for potential application to company business needs Makes recommendations for technology investments Basic Qualifications (Required Skills and Experience): Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement 9+ years of related work experience and a bachelor's degree or an equivalent combination of related work experience and technical education Preferred Qualifications (Desired Skills and Experience): Experience in Open Mission Systems (OMS) development Experience in Model Based System Engineering (MBSE) development Familiarity with Universal Command and Control Interface (UCI) message standard and Common Abstraction Layer (CAL) Experience with system design and development, including component interactions, interfaces, and overall system functionality Experience with requirements development and management, including technical performance specification and statement of work development. Experience with NSA C2 and NCDSMO interactions and certification processes Experience with multi-level Security Networks Experience with multi-level Security Embedded Systems Experience with Cryptographic units, Cross Domain Solutions/Guards including access CDS and transfer CDS Knowledge of 3U and 6U VPX/OpenVPX architectures: This includes the VITA 46 and VITA 65 standards, appreciating the distinct advantages and trade-offs of each form factor in terms of size, weight, power (SWaP), processing capability, and I/O density. Knowledge of Signal Integrity & Interconnect: Expertise in high-speed digital signal design, including impedance matching, managing signal integrity, and utilizing advanced interconnect solutions like VPX3's discrete coaxial/twinax cabling is highly valued Experience with High-Performance Embedded Computing (HPEC): How to integrate and optimize performance for demanding workloads within the constraints of 3U and 6U form factors Experience with hardware design and development, encompassing all phases of the product lifecycle from initial design to flight maturity Experience with hardware-in-the-loop (HIL) simulations and testing methodologies to verify system functionality Experience with designing secure architectures, implementing cryptographic protocols, secure boot processes, firmware validation, and secure communications Experience with Open Architecture Standards: Familiarity with standards like SOSA (Sensor Open Systems Architecture), which leverages VPX standards Experience with Mezzanine Card Utilization: Understanding how mezzanine cards (e.g., XMC) can enhance functionality and scalability within 3U and 6U VPX systems Experience with 3U/6U FPGAs, GPU, and CPUs Conflict of Interest: Successful candidates for this job must satisfy the Company's Conflict of Interest (COI) assessment process. Relocation: This position offers relocation based on candidate eligibility. Note: Basic relocation will be offered for eligible internal candidates. Drug Free Workplace: Boeing is a Drug Free Workplace (DFW) where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies. The Boeing 401(k) helps you save for your future, with contributions from Boeing that can help you grow your retirement savings. Our best-in-class retirement benefit features: Best in class 401(k) plan: we'll match your contributions dollar for dollar, up to 10% of eligible pay with Immediate 100% vesting Student Loan Match: The Boeing 401(k) Student Loan Match allows eligible enrolled U.S. employees to have their qualified student loan debt payments counted, along with any match-eligible contributions they make, for purposes of determining the Company Match to employees' Boeing 401(k) accounts. Pay & Benefits: At Boeing, we strive to deliver a Total Rewards package that will attract, engage and retain the top talent. Elements of the Total Rewards package include competitive base pay and variable compensation opportunities. The Boeing Company also provides eligible employees with an opportunity to enroll in a variety of benefit programs, generally including health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance programs, and a number of programs that provide for both paid and unpaid time away from work. The specific programs and options available to any given employee may vary depending on eligibility factors such as geographic location, date of hire, and the applicability of collective bargaining agreements. Pay is based upon candidate experience and qualifications, as well as market and business considerations. Summary pay range: $136,850-$185,150 Applications for this position will be accepted until Apr. 10, 2026 Export Control Requirements: This position must meet U.S. export control compliance requirements. To meet U.S. export control compliance requirements, a "U.S. Person" as defined by 22 C.F.R. 120.62 is required. "U.S. Person" includes U.S. Citizen, U.S. National, lawful permanent resident, refugee, or asylee. Export Control Details: US based job, US Person required Education Bachelor's Degree or Equivalent Required Relocation This position offers relocation based on candidate eligibility. Security Clearance This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim U.S. Secret Clearance Pre-Start and final U.S. Secret Clearance Post-Start is required. Visa Sponsorship Employer will not sponsor applicants for employment visa status. Shift This position is for 1st shift Equal Opportunity Employer: Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military/veteran status or other characteristics protected by law.

L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers' mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do. L3Harris is the Trusted Disruptor in defense tech. With customers' mission-critical needs always in mind, our employees deliver end-to-end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security. Job Title: ASIC/FPGA Design Engineer (SMES) Job Code: 34234 Job Location: Camden, NJ Schedule: 9/80 Regular with every other Friday off Are you ready to take your engineering career to the next level and be a part of something truly extraordinary? Join our trailblazing team in the Philadelphia metro area, where you'll dive into the thrilling world of high-assurance encryption products and programs that are pivotal to national defense. Our rapidly expanding business is not just growing-it's exploding with opportunities for innovation and impact in network and tactical encryption products and systems. Imagine working on the front lines of technology, developing state-of-the-art solutions that safeguard our nation's security. You'll collaborate with some of the brightest minds in the industry, in an environment that champions creativity and excellence. If you're passionate about tackling complex challenges and eager to contribute to groundbreaking projects that make a real difference to our warfighters, citizens, and nation; this is your chance to shine. Apply now and embark on this exhilarating journey with us, shaping the future of defense technology! Eligible candidates with an active government issued clearance upon the time of hire will receive a sign-on payment in the amount of $ 15,000. Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA design team, responsible for the delivery of FPGA/ASICs for high-speed crypto applications. S/he will architect, implement high speed crypto architectures, on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands on design/debug with Ethernet, TCP/IP protocols. L3Harris has state-of-the-art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA with HLS, Mentor EDA Family suite : Questa, VIPs, UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, and Catapult (HLS). This is a key, high impact role in the organization to ensure robust quality and delivery of communication products for National Security. Essential Functions: Responsible for deriving engineering specifications from system requirements and developing detailed architecture Execute design (RTL AND/OR HLS (C++ to RTL and RTL quality (RDC, CDC, Formal, Lint) Generate test plans Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards Silicon/FPGA bring up, characterization and production ramp/support/collateral Qualifications: BSEE, MSEE Preferred. 5+ year's equivalent experience developing, implementing, and verification of high-performance communications/networking ASIC/FPGA products. Experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs. Proficient with CDC, RDC. Formal EDA. Proficient in VHDL. Proficient with Synthesis/PAR: SDC, Synopsys Synplify, Vivado Strong logic/board debug, and analytical skills. Experience with project leadership and EVM Excellent written, verbal, and presentation skills. Active SECRET Clearance Preferred Additional Skills: A big plus if the candidate possesses "any" of the following: Proficiency in C++ (OOP) Proficiency with Xilinx MPSOC design with writing/debugging with SDKs, BSPs on bare metal/PetaLinux OS. Knowledge of PCIe, NVMe, USB protocols. Experience with High level synthesis (Xilinx Vivado HLS, AND/OR Mentor Calypto ). In compliance with pay transparency requirements, the salary range for this role is $111,515 - $151,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements. L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law. Please be aware many of our positions require the ability to obtain a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information. By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions. L3Harris Technologies is an E-Verify Employer. Please click here for the E-Verify Poster in English or Spanish. For information regarding your Right To Work, please click here for English or Spanish.

L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers' mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do. L3Harris is the Trusted Disruptor in defense tech. With customers' mission-critical needs always in mind, our employees deliver end-to-end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security. Job Title: ASIC/FPGA Design Engineer (SMES) Job Code: 34234 Job Location: Camden, NJ Schedule: 9/80 Regular with every other Friday off Are you ready to take your engineering career to the next level and be a part of something truly extraordinary? Join our trailblazing team in the Philadelphia metro area, where you'll dive into the thrilling world of high-assurance encryption products and programs that are pivotal to national defense. Our rapidly expanding business is not just growing-it's exploding with opportunities for innovation and impact in network and tactical encryption products and systems. Imagine working on the front lines of technology, developing state-of-the-art solutions that safeguard our nation's security. You'll collaborate with some of the brightest minds in the industry, in an environment that champions creativity and excellence. If you're passionate about tackling complex challenges and eager to contribute to groundbreaking projects that make a real difference to our warfighters, citizens, and nation; this is your chance to shine. Apply now and embark on this exhilarating journey with us, shaping the future of defense technology! Eligible candidates with an active government issued clearance upon the time of hire will receive a sign-on payment in the amount of $ 15,000 . Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA design team, responsible for the delivery of FPGA/ASICs for high-speed crypto applications. S/he will architect, implement high speed crypto architectures, on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands on design/debug with Ethernet, TCP/IP protocols. L3Harris has state-of-the-art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA with HLS, Mentor EDA Family suite : Questa, VIPs, UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, and Catapult (HLS). This is a key, high impact role in the organization to ensure robust quality and delivery of communication products for National Security. Essential Functions: Responsible for deriving engineering specifications from system requirements and developing detailed architecture Execute design (RTL AND/OR HLS (C++ to RTL and RTL quality (RDC, CDC, Formal, Lint) Generate test plans Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards Silicon/FPGA bring up, characterization and production ramp/support/collateral Qualifications: BSEE, MSEE Preferred. 5+ year's equivalent experience developing, implementing, and verification of high-performance communications/networking ASIC/FPGA products. Experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs. Proficient with CDC, RDC. Formal EDA. Proficient in VHDL. Proficient with Synthesis/PAR: SDC, Synopsys Synplify, Vivado Strong logic/board debug, and analytical skills. Experience with project leadership and EVM Excellent written, verbal, and presentation skills. Active SECRET Clearance Preferred Additional Skills: A big plus if the candidate possesses "any" of the following: Proficiency in C++ (OOP) Proficiency with Xilinx MPSOC design with writing/debugging with SDKs, BSPs on bare metal/PetaLinux OS. Knowledge of PCIe, NVMe, USB protocols. Experience with High level synthesis (Xilinx Vivado HLS, AND/OR Mentor Calypto ). In compliance with pay transparency requirements, the salary range for this role is $111,515 - $151,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements. L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law. Please be aware many of our positions require the ability to obtain a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information. By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions. L3Harris Technologies is an E-Verify Employer. Please click here for the E-Verify Poster in English or Spanish. For information regarding your Right To Work, please click here for English or Spanish.

L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers' mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do. L3Harris is the Trusted Disruptor in defense tech. With customers' mission-critical needs always in mind, our employees deliver end-to-end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security. Job Title: ASIC/FPGA Design Engineer (SMES) Job Code: 34234 Job Location: Camden, NJ Schedule: 9/80 Regular with every other Friday off Are you ready to take your engineering career to the next level and be a part of something truly extraordinary? Join our trailblazing team in the Philadelphia metro area, where you'll dive into the thrilling world of high-assurance encryption products and programs that are pivotal to national defense. Our rapidly expanding business is not just growing-it's exploding with opportunities for innovation and impact in network and tactical encryption products and systems. Imagine working on the front lines of technology, developing state-of-the-art solutions that safeguard our nation's security. You'll collaborate with some of the brightest minds in the industry, in an environment that champions creativity and excellence. If you're passionate about tackling complex challenges and eager to contribute to groundbreaking projects that make a real difference to our warfighters, citizens, and nation; this is your chance to shine. Apply now and embark on this exhilarating journey with us, shaping the future of defense technology! Eligible candidates with an active government issued clearance upon the time of hire will receive a sign-on payment in the amount of $ 15,000 . Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA design team, responsible for the delivery of FPGA/ASICs for high-speed crypto applications. S/he will architect, implement high speed crypto architectures, on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands on design/debug with Ethernet, TCP/IP protocols. L3Harris has state-of-the-art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA with HLS, Mentor EDA Family suite : Questa, VIPs, UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, and Catapult (HLS). This is a key, high impact role in the organization to ensure robust quality and delivery of communication products for National Security. Essential Functions: Responsible for deriving engineering specifications from system requirements and developing detailed architecture Execute design (RTL AND/OR HLS (C++ to RTL and RTL quality (RDC, CDC, Formal, Lint) Generate test plans Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards Silicon/FPGA bring up, characterization and production ramp/support/collateral Qualifications: BSEE, MSEE Preferred. 5+ year's equivalent experience developing, implementing, and verification of high-performance communications/networking ASIC/FPGA products. Experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs. Proficient with CDC, RDC. Formal EDA. Proficient in VHDL. Proficient with Synthesis/PAR: SDC, Synopsys Synplify, Vivado Strong logic/board debug, and analytical skills. Experience with project leadership and EVM Excellent written, verbal, and presentation skills. Active SECRET Clearance Preferred Additional Skills: A big plus if the candidate possesses "any" of the following: Proficiency in C++ (OOP) Proficiency with Xilinx MPSOC design with writing/debugging with SDKs, BSPs on bare metal/PetaLinux OS. Knowledge of PCIe, NVMe, USB protocols. Experience with High level synthesis (Xilinx Vivado HLS, AND/OR Mentor Calypto ). In compliance with pay transparency requirements, the salary range for this role is $111,515 - $151,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements. L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law. Please be aware many of our positions require the ability to obtain a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information. By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions. L3Harris Technologies is an E-Verify Employer. Please click here for the E-Verify Poster in English or Spanish. For information regarding your Right To Work, please click here for English or Spanish.

L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers' mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do. L3Harris is the Trusted Disruptor in defense tech. With customers' mission-critical needs always in mind, our employees deliver end-to-end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security. Job Title: ASIC/FPGA Design Engineer (SMES) Job Code: 34234 Job Location: Camden, NJ Schedule: 9/80 Regular with every other Friday off Are you ready to take your engineering career to the next level and be a part of something truly extraordinary? Join our trailblazing team in the Philadelphia metro area, where you'll dive into the thrilling world of high-assurance encryption products and programs that are pivotal to national defense. Our rapidly expanding business is not just growing-it's exploding with opportunities for innovation and impact in network and tactical encryption products and systems. Imagine working on the front lines of technology, developing state-of-the-art solutions that safeguard our nation's security. You'll collaborate with some of the brightest minds in the industry, in an environment that champions creativity and excellence. If you're passionate about tackling complex challenges and eager to contribute to groundbreaking projects that make a real difference to our warfighters, citizens, and nation; this is your chance to shine. Apply now and embark on this exhilarating journey with us, shaping the future of defense technology! Eligible candidates with an active government issued clearance upon the time of hire will receive a sign-on payment in the amount of $ 15,000 . Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA design team, responsible for the delivery of FPGA/ASICs for high-speed crypto applications. S/he will architect, implement high speed crypto architectures, on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands on design/debug with Ethernet, TCP/IP protocols. L3Harris has state-of-the-art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA with HLS, Mentor EDA Family suite : Questa, VIPs, UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, and Catapult (HLS). This is a key, high impact role in the organization to ensure robust quality and delivery of communication products for National Security. Essential Functions: Responsible for deriving engineering specifications from system requirements and developing detailed architecture Execute design (RTL AND/OR HLS (C++ to RTL and RTL quality (RDC, CDC, Formal, Lint) Generate test plans Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards Silicon/FPGA bring up, characterization and production ramp/support/collateral Qualifications: BSEE, MSEE Preferred. 5+ year's equivalent experience developing, implementing, and verification of high-performance communications/networking ASIC/FPGA products. Experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs. Proficient with CDC, RDC. Formal EDA. Proficient in VHDL. Proficient with Synthesis/PAR: SDC, Synopsys Synplify, Vivado Strong logic/board debug, and analytical skills. Experience with project leadership and EVM Excellent written, verbal, and presentation skills. Active SECRET Clearance Preferred Additional Skills: A big plus if the candidate possesses "any" of the following: Proficiency in C++ (OOP) Proficiency with Xilinx MPSOC design with writing/debugging with SDKs, BSPs on bare metal/PetaLinux OS. Knowledge of PCIe, NVMe, USB protocols. Experience with High level synthesis (Xilinx Vivado HLS, AND/OR Mentor Calypto ). In compliance with pay transparency requirements, the salary range for this role is $111,515 - $151,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements. L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law. Please be aware many of our positions require the ability to obtain a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information. By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions. L3Harris Technologies is an E-Verify Employer. Please click here for the E-Verify Poster in English or Spanish. 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