28 jobs found

Job Description Job Description HRL Laboratories Description: HRL Laboratories, an IBM company, pioneers the next frontiers of physical and information science. Delivering transformative technologies in automotive, aerospace and defense, HRL advances the critical missions of its customers to help them remove limitations and create competitive advantage. HRL then transitions the work back to customers - ready for real-world application. For more than 70 years, HRL's rich portfolio of scientific discoveries and engineering innovations continues to build on each other - often in unexpected, profound and far-reaching ways. As a private company owned by IBM, HRL prioritizes purpose over profit, significantly advancing the state of the art. HRL Laboratories develops radiofrequency, millimeter-wave and electro-optical sensors using state-of-the-art materials and device fabrication processes to deliver agile, mission-ready systems. Our high-performance solutions are highly integrated, architecturally low cost, and optimized for size, weight and power efficiency while leveraging commercial, custom and novel mixed-signal innovations. Our Sensing and Communication Systems Division is composed of talented scientists and engineers with expertise in RFIC and MMIC circuit design, advanced packaging, antenna design, system prototyping, signal processing, integration and characterization to build advanced radar and communication systems. We are looking to hire a highly experienced candidate to lead next generation of radar technologies from research & development (R&D) into prototypes/products such as active electronically scanned arrays (AESA). This role will be instrumental in developing and supporting our technical strategies and roadmaps, leading our engineering teams, and driving the development of innovative products for our customers. Key Responsibilities: • Lead the end-to-end development life cycle, from conceptualization to deployment • Oversee the system architectural design and technical integrity ensuring all engineering activities and developments comply with customer requirements • Provide strong technical leadership and guidance to all engineering disciplines including radar hardware, software, system integrations, and tests. • Identify and mitigate technical risks throughout the product lifecycle, from conceptual design through deployment. • Conduct technical reviews, provide guidance and make critical technical decisions on complex engineering challenges. • Drive R&D initiatives, exploring emerging technologies to maintain our competitive edge and introduce disruptive capabilities. • Additional job functions include writing invention disclosures, publishing papers, briefing customers, and leading in proposal/marketing activities Required Skills: • Bachelor's or master's or Ph.D. degree in electrical engineering, mechanical engineering or a related technical discipline • 10+ years of technical and leadership experience in research and product development on advanced phased array radar systems. • Expert knowledge in system analysis, system architecture, requirements development, trade studies, modeling and simulation, integration and test, and data analysis • Experience with advanced microelectronic packaging and manufacturing, high frequency and electromagnetic simulation tools • Understanding of DoD missions and technology acquisition process • Familiarity with regulations and standards for military (MIL-STD) and RF hardware • Experience implementing system engineering principles and working with technical teams to ensure compliance with best practices. • Demonstrated ability to lead and mentor large multidisciplinary engineering teams • Strong written and verbal communication skills with the ability to work collaboratively in a fast-paced, dynamic environment Physical Requirements: • Interact professionally with program managers, co-workers, and customers • Perform detailed analyses and prepare written and oral presentations. • Ability to work well in a team and independently • Willing to travel • Work in a team of highly skilled engineers on complex projects, and willing to work in a fast-paced, deadline-driven environment Special Requirements: US Citizenship with the ability to obtain and maintain a Government security clearance Active Security clearance is a plus. Compensation and Benefits: Pay Range : $193,700 - $248,250 Our salary ranges are determined by role, level, and location (California). The range displayed on each job posting reflects the target range for new hire salaries for the position. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range during the hiring process. Benefits: HRL offers a generous and very competitive total compensation and benefits package. Our Regular/Full Time benefits include medical, dental, vision, life insurance, 401K match, gym facilities, PTO, Sick time, upward mobility, and an exciting and challenging work environment. For more information about our company benefit offerings please visit: Non-Discrimination and Equal Employment Opportunities (U.S.) Don't meet every single requirement? Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At HRL, we are dedicated to building a diverse, inclusive, and authentic workplace, so if you're excited about this role but your past experience doesn't align perfectly with every qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles. We are proud to be an EEO/AA employer M/F/D/V. We maintain a drug-free workplace and perform pre-employment substance abuse testing. If you would like more information about Equal Employment Opportunity as an applicant under the law, please go to Employees & Job Applicants U.S. Equal Employment Opportunity Commission For our privacy policy please visit: We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.

Job Description Job Description Machines learned to understand language. We're teaching them to understand matter. Forty percent of global manufacturing happens through physical and chemical processes inside pipes, tanks, and reactors. Despite decades of industrial automation, much of what happens inside them remains remarkably invisible. Manufacturing is the most ubiquitous and foundational sector in global economy, yet the way factories are fundamentally run have used the same control philosophies, manual operations, and legacy software for the past 60 years. Laminar deploys state-of-the-art patented sensors and edge hardware directly into live production environments, generating data that didn't previously exist to build foundation models deployed in factory floors that understand chemistry, composition, quality, and material state in real time. We use that understanding to run autonomy and rethink how things are made. The last generation of industrial automation taught machines to execute instructions reliably. The next will teach them to understand the processes they control and run autonomously, adaptively, and agentically: higher quality, safety, more efficiently, sustainably, and productively. That future is already taking shape. Today, Laminar works with 7 of the world's 10 largest food and beverage manufacturers and operates across hundreds of factories globally across six continents. Our systems have materially reduced waste, cut manufacturing downtime, saved water, chemicals, energy, and helped prevent safety and quality failures. Our technology has gained international recognition, from being selected as a 2026 World Economic Forum Technology Pioneer, Gold 2026 Edison Award, Unilever Startup of the Year, to Innovator Awards by both Coca-Cola and AB InBev, and more. We are backed by tier-one investors in physical AI to make intelligent, self-improving production the new standard for industry. Join us to build what makes matter intelligible, and the intelligible controllable. As new sensing technologies are integrated into our stack, we need rigorous testing and analysis to improve sensor design, to establish noise and drift characteristics, and to find Limits of Detection (LOD) across industry-relevant chemicals. You will own sensor testing: designing experiments, preparing samples, collecting and analyzing data, and presenting results to the engineering teams. What You Will Do Collaborate with our sensor R&D team to design testing procedures, carry out tests, and analyze data to characterize new sensor performance Support customer-driven use-case exploration, running material fingerprinting and concentration tests, analyzing data and building customer-facing slides Prepare samples at known concentrations, serial dilutions and emulsifications following lab-safety protocols Use statistical methods to calculate LODs for industrially relevant chemicals Focus on experiment reproducibility by maintaining a lab notebook, writing and refining Standard Operating Procedures, and organizing raw data for future comparison Design, test and refine calibration procedures for the new sensing stack About You Degree or pursuing a degree in Chemistry, Physics, Engineering or a related field Detail-oriented and able to follow (and constructively critique) experimental procedure Willingness to get your hands dirty on a wide variety of engineering and technician tasks to help us build better sensors and solve bigger problemsRequired Coursework or experience in chemistry, physics, optical engineering, or a related field Comfort with hands-on lab work and running structured experiments Statistics and data analysis skills (Python, MATLAB, or similar) Preferred Familiarity with spectroscopy and electrical impedance measurement is a plus but not required Benefits Dynamic and inclusive work environment Opportunities for growth and professional development Access to Greentown Labs extensive network of cleantech startups Learn How We Think Learn about our startup journey: Our Journey How we're combating climate change: AI-Powered Climate Tech A customer story: Ben & Jerry's uses H2Ok's precision automation to cut time & water usage There are many easier places to work on AI. Laminar is for people who want the hardest version of their discipline. Models here must survive contact with physics. Hardware must survive years of continuous industrial operation. Software must integrate with machinery built decades ago. Everything we build ultimately has to work on a factory floor. We believe exceptional people should be given exceptional amounts of ownership. At Laminar, you will have the context to form your own view, the permission to challenge ours, and the resources to pursue the right answers, whatever technical or organizational boundaries stand in the way. There are few layers between identifying something important and changing it. We're fortunate to work with a small polymathic team of hardware and software engineers, chemists, AI researchers, factory operators, and go-to-market wizards who are unusually capable, curious, rigorous, ambitious, and low-ego. If that sounds like you, we'd love to meet you. Our Interview Process 1. Phone screen with Laminar HR/Recruiter (15-20 minutes) 2. Intro call with Hiring Manager (30 minutes) 3. On-site interview, overview of tech, and interview/presentation with the Hiring Manager and a few team members. Depending on the role, a skills exercise that should take no longer than an hour to prep, would be sent ahead of time. We record your skills exercise to share with any team members who could not join the interview and/or with Founder's ahead of their Founder's Interview. If you are not local, we can conduct this virtually. 4. Finalists for Full-Time positions will have a Founder's Interview in-person Final steps: Two professional references are requested, ideally one from your current organization and one who served as your Manager If an Offer Letter is extended, a Background check is conducted Laminar is committed to building a diverse and inclusive team. Even if you are unsure you are a perfect fit, we strongly encourage you to apply! If you're ready to play a key role in scaling a game-changing company that's transforming the industrial sector and advancing sustainability, we want to hear from you. Please ensure you add the domain to your safe senders list to ensure you receive our communications. We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.

Job Description Job Description Senior Hardware Engineer, Analog & Mixed-Signal Location: NYC About Us Voyant Photonics is transforming machine perception with a new class of LiDAR devices that are compact enough to fit in the palm of your hand and powerful enough to measure range, velocity, and reflectivity with unparalleled accuracy. By leveraging cutting-edge silicon photonic chips smaller than your fingertip, we deliver sensors that are not only revolutionary in performance but also affordable enough to integrate into any system. Our technology disrupts the status quo of bulky, expensive, and power-hungry LiDAR systems, making high-precision sensing accessible for widespread adoption in robotics, autonomous vehicles, drones, industrial automation, and beyond. With Voyant, the next generation of machines can see, understand, and navigate the world like never before. Discover how we're redefining what's possible by making real products out of cutting-edge research in silicon photonics. The Opportunity We're looking for a senior hardware leader to set the technical direction for the analog and mixed-signal electronics behind our LiDAR modules. You'll operate at the intersection of product design, silicon photonics, and machine perception - owning the hardest trade-offs, setting the standard other engineers build to, and mentoring the team as we scale. This is a high-leverage role for someone who wants their fingerprints on a foundational technology, not just a single product. Key Responsibilities Define the analog and mixed-signal architecture for next-generation LiDAR modules, setting technical direction across TIAs, ADCs, precision current sources, and power delivery (LDOs, switching regulators). Act as the technical authority on signal integrity, power integrity, and EMI/EMC across the product line - establish the design standards and review processes the rest of the team works to. Lead bring-up, characterization, and validation strategy (EVT/DVT/PVT) across multiple concurrent programs, with accountability for robustness, repeatability, and manufacturability at scale. Own the highest-stakes design trade-offs (performance, cost, power, integration complexity) that shape product roadmap and unit economics. Mentor and provide technical direction to other hardware engineers; serve as the senior technical voice in cross-functional reviews with system architects, mechanical engineering, and firmware. Drive supplier and component strategy for critical analog parts, engaging directly with vendors and foundries on custom or constrained components. Represent hardware engineering in technical deep-dives with customers, partners, and investors as needed. Qualifications Experience: 10+ years in hands-on hardware development, with end-to-end ownership of multiple systems shipped at high volume. Leadership: Track record of setting technical direction for a team or product line - not only individual delivery. Technical Strengths: Recognized expert in low-noise analog and high-speed digital design. Go-to authority on signal/power integrity, high-density interconnect, and EMI mitigation techniques. Proven success driving designs through high-volume DFM, reliability testing, and yield optimization. Tools & Skills: Expert in schematic capture and simulation (e.g., SPICE), with deep fluency in Altium or similar. Advanced use of SI/PI simulation tools (e.g., HyperLynx, SiWave) and measurement tools (GHz-range scopes, VNAs, spectrum analyzers). Extensive experience integrating FPGAs, microcontrollers, and custom analog ASICs at the board level. Preferred Qualifications Prior experience in photonics, LiDAR, or other precision-sensing hardware. Experience building or scaling a hardware engineering team, or serving formally as a technical lead/architect. Knowledge of flex and rigid-flex PCB design. Familiarity with Verilog-AMS, mixed-signal modeling, or FPGA development. Experience designing for high-reliability or harsh environments (e.g., automotive, aerospace, defense). Benefits Package Competitive base salary and a meaningful equity package. Comprehensive health benefits (Medical, Dental, Vision). Unlimited PTO and paid company holidays. Team events and company meetups. Equal Opportunity Employer Voyant Photonics is an equal opportunity employer committed to building a diverse and inclusive workplace. We welcome applicants from all backgrounds and do not discriminate based on race, color, religion, gender, gender identity or expression, sexual orientation, pregnancy, marital or partnership status, age, national origin, citizenship, veteran or military status, disability, medical condition, genetic information, caregiver status, or any other characteristic protected by law. Compensation Range: $140K - $170K

Job Description Job Description Principal Hardware Engineer, Analog & RF About Mesa Quantum Mesa Quantum is building the manufacturing backbone of the quantum economy. We specialize in chip-scale quantum devices, starting with clocks and sensors, that unlock resilient Position, Navigation, and Timing (PNT) for defense, telecom, space, and critical infrastructure. Our team combines world-class expertise in AMO physics, photonics, microfabrication, and engineering to transform breakthrough science into scalable, deployable technology. Backed by top-tier deep-tech investors and the U.S. Department of Defense, Mesa Quantum is rapidly scaling and actively recruiting exceptional innovators who want to build the future of quantum technology from the ground up. The Role We are hiring a Principal Hardware Engineer to own the board-level control electronics at the core of our chip-scale atomic clock. This is a circuit board design role, not an IC design role: you will take precision analog and RF boards from schematic through layout, bring-up, characterization, and production. You will be the senior hardware engineer on the clock. You own the analog front end, the microwave synthesis chain, the laser drive and thermal control electronics, and the boards that tie them together. You will work daily with our AMO physics, photonics, firmware, and systems teams, and you will set the standard for how Mesa Quantum designs hardware. This is a hands-on principal role. You are expected to personally do the bulk of the circuit and PCB design work, not delegate it. We want an engineer who loves designing circuits, takes pride in clean analog topology and a well-routed board, and would rather be at the bench than in front of slides. Reports to the CTO. Full-time, on-site in Boulder, CO. What You Will Do Design and lay out multi-layer precision analog and RF circuit boards yourself, from schematic capture and simulation through PCB layout, fabrication, bring-up, and debug Own the precision analog front end: photodetector signal conditioning, low-noise transimpedance and instrumentation amplification, and lock-in detection for weak atomic signal recovery Design and validate the microwave synthesis chain that drives atomic interrogation, including PLL and VCO design, phase noise optimization, and reference distribution Design precision VCSEL current drive and thermal control electronics for the laser and physics package Architect successive generations of the control electronics, driving size, power, and noise down at each iteration Build characterization protocols, test fixtures, and automation to validate clock performance against Allan deviation, phase noise, and holdover targets Partner with firmware engineers on the hardware and software interface, and with physicists on the system noise budget Drive Design for Manufacturability and Design for Test with PCB fabricators, assembly houses, and contract manufacturers as we scale toward volume production Set hardware design standards, lead design reviews, and mentor engineers Requirements What You Bring: 10+ years of board-level analog and RF hardware design, including at least one product taken from prototype through volume production A track record of multi-layer boards you personally designed and laid out, mixing sensitive analog, RF, and digital circuits: stack-up definition, controlled impedance, grounding and return-path control, shielding, and thermal management. Be ready to walk us through one in the interview. Current, hands-on proficiency in a professional PCB design tool such as Altium Designer, Cadence Allegro/OrCAD, or KiCad Deep expertise in low-noise precision analog: signal conditioning, low-noise amplifiers, ADC and DAC interfacing, and rigorous noise budgeting RF circuit design through GHz frequencies, with hands-on experience in low phase noise frequency synthesis, PLLs, and VCOs Strong SPICE simulation and circuit analysis skills, including noise, stability, and tolerance analysis Hands-on bench proficiency with oscilloscopes, spectrum and phase noise analyzers, network analyzers, source measure units, and signal generators Scripting experience for instrument control, characterization, and data analysis Version control (Git or similar) for hardware design files Strongly Preferred Chip-scale atomic clocks, rubidium or cesium oscillators, OCXOs, or other precision frequency references Optoelectronics: VCSEL or laser diode drive, photodetector readout, laser frequency locking Embedded firmware in C/C++ on ARM Cortex-M class microcontrollers FPGA development in Verilog or SystemVerilog, including real-time DSP (lock-in detection, PID, digital filtering) Hardware design under hard size, weight, and power budgets Board-level integration of custom mixed-signal silicon, including block specification or characterization Hands-on management of PCB fabricators, assembly houses, and contract manufacturers Defense, aerospace, or space-qualified hardware experience Familiarity with atomic physics or other quantum sensing modalities Experience leading or mentoring a small hardware team Eligibility Due to U.S. Department of Defense funding requirements, applicants must be U.S. persons (U.S. citizens or lawful permanent residents). The ability to obtain and maintain a U.S. security clearance may be required for certain projects. Benefits Base salary of $180,000 to $230,000, based on experience, skills, and demonstrated expertise Meaningful equity in a deep-tech company at the inflection point between prototype and product Comprehensive benefits package Direct ownership of a critical subsystem with measurable impact on a product that matters to U.S. national security A team that includes deep AMO physics, RF, photonics, and microfabrication expertise Boulder location with access to Colorado's strongest tech and outdoor communities

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role As a Senior ATE Security Engineer, you will engage with an experienced cross-disciplinary staff to deliver secure, high-quality custom silicon powering the Leo network. This role has two focuses: device security and provisioning during test, and the development of reusable ATE library and automation software that accelerates test development across the team. You will own secure device provisioning and security algorithm test on Advantest 93K and/or Teradyne UltraFLEX platforms, including secure key and identity injection, OTP/eFuse programming, and fuse-based lifecycle management. You will also design and build reusable, well-architected library code and tooling, such as pattern search utilities, automated sub-flow generation, and auto-generation of test programs from patterns, that improve the productivity, consistency, and quality of the entire test engineering team. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment, and you will influence design, DFT, security, and manufacturing teams to ensure our products are architected for security, testability, and cost-effective high-volume manufacturing. Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Own device security and secure provisioning during test, including secure boot, secure key and identity injection, cryptographic provisioning, fuse-based configuration and lifecycle management, and debug-port lockdown. • Develop, own, and qualify OTP/eFuse programming flows, addressing challenges such as programming margin, read-back verification, repeatability, and the irreversible nature of fuse operations across process, voltage, and temperature. • Integrate ATE flows with secure provisioning systems, HSMs, or key-management infrastructure. • Develop and validate JTAG and debug-access flows on post-provisioned units to enable debug of RMA returns and downstream quality issues, while preserving device security posture. • Design, build, and maintain reusable ATE library code and tooling that accelerates test development across the team. • Develop utilities for pattern search and analysis, automated sub-flow generation, and auto-generation of test programs from patterns. • Architect libraries and frameworks for reusability, maintainability, and scale, applying strong software engineering practices (modular design, version control, code review, and testing). • Run firmware on DUTs to enable secure provisioning, self-test, and reduced test time. • Partner with ASIC design, DFT, security, and firmware teams to ensure devices meet Amazon standards for secure provisioning, design-for-test, and design-for-manufacturability. • Actively identify security, test-readiness, and software gaps throughout the product lifecycle and drive them to resolution. • Lead technical and security reviews and set software and security best practices for the team. BASIC QUALIFICATIONS- Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent work experience - 7+ years of experience in silicon test, security engineering, or test software development. - Experience with device security and secure provisioning during test, including OTP/eFuse programming. - Working knowledge of the fundamentals of encryption, cryptographic keys, and secure communication channels. - Strong software engineering skills, including proficiency in a language such as Python and/or C/C++, and experience building reusable, well-architected code. - Experience developing test or automation software on Advantest 93K and/or Teradyne UltraFLEX platforms. - Strong written and verbal communication skills. - International travel required during release-to-production phases. PREFERRED QUALIFICATIONS- Master's degree in Electrical/Computer Engineering or Computer Science. - Demonstrated ability to lead cross-functional technical efforts and mentor other engineers. - Expertise in standard silicon security concerns for modem and SoC devices, such as secure boot, secure key and identity provisioning, fuse-based lifecycle management, and debug-port lockdown. - Experience implementing cryptographic provisioning flows involving keys, certificates, and device identities in a manufacturing or test environment. - Experience working with anti-tamper and physical security blocks in silicon, such as tamper detection, sensors, and secure-element hardening. - In-depth understanding of OTP/eFuse programming challenges, including margin, read-back verification, repeatability, and managing irreversible operations at high volume. - Strong software development background, with experience building reusable ATE libraries and tooling (pattern search, sub-flow generation, automated test-program generation). - Experience with digital test of complex SoCs, including developing, debugging, and analyzing coverage for scan/ATPG, MBIST, boundary scan (JTAG), and functional tests. - Experience developing and debugging test programs on ATE platforms such as Advantest 93K and Teradyne UltraFLEX. - Experience with high-speed SERDES test and characterization, including equalization test and tuning (CTLE/DFE/FFE), jitter decomposition, and eye/BER analysis. - Experience developing high-volume manufacturing test solutions and driving the full test release process across the New Product Introduction (NPI) lifecycle, from silicon bring-up, characterization, and qualification through production hand-off and ramp. - Familiarity with I/O protocols such as I3C, SPI, and GPIO. - Experience testing complex modem and SoC devices in advanced process nodes. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at . USA, CA, San Diego - 185 000.00 USD annually USA, CA, Sunnyvale - 213 500.00 USD annually USA, WA, Redmond - 185 000.00 USD annually

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role As a Senior ATE Security Engineer, you will engage with an experienced cross-disciplinary staff to deliver secure, high-quality custom silicon powering the Leo network. This role has two focuses: device security and provisioning during test, and the development of reusable ATE library and automation software that accelerates test development across the team. You will own secure device provisioning and security algorithm test on Advantest 93K and/or Teradyne UltraFLEX platforms, including secure key and identity injection, OTP/eFuse programming, and fuse-based lifecycle management. You will also design and build reusable, well-architected library code and tooling, such as pattern search utilities, automated sub-flow generation, and auto-generation of test programs from patterns, that improve the productivity, consistency, and quality of the entire test engineering team. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment, and you will influence design, DFT, security, and manufacturing teams to ensure our products are architected for security, testability, and cost-effective high-volume manufacturing. Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Own device security and secure provisioning during test, including secure boot, secure key and identity injection, cryptographic provisioning, fuse-based configuration and lifecycle management, and debug-port lockdown. • Develop, own, and qualify OTP/eFuse programming flows, addressing challenges such as programming margin, read-back verification, repeatability, and the irreversible nature of fuse operations across process, voltage, and temperature. • Integrate ATE flows with secure provisioning systems, HSMs, or key-management infrastructure. • Develop and validate JTAG and debug-access flows on post-provisioned units to enable debug of RMA returns and downstream quality issues, while preserving device security posture. • Design, build, and maintain reusable ATE library code and tooling that accelerates test development across the team. • Develop utilities for pattern search and analysis, automated sub-flow generation, and auto-generation of test programs from patterns. • Architect libraries and frameworks for reusability, maintainability, and scale, applying strong software engineering practices (modular design, version control, code review, and testing). • Run firmware on DUTs to enable secure provisioning, self-test, and reduced test time. • Partner with ASIC design, DFT, security, and firmware teams to ensure devices meet Amazon standards for secure provisioning, design-for-test, and design-for-manufacturability. • Actively identify security, test-readiness, and software gaps throughout the product lifecycle and drive them to resolution. • Lead technical and security reviews and set software and security best practices for the team. BASIC QUALIFICATIONS - Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent work experience - 7+ years of experience in silicon test, security engineering, or test software development. - Experience with device security and secure provisioning during test, including OTP/eFuse programming. - Working knowledge of the fundamentals of encryption, cryptographic keys, and secure communication channels. - Strong software engineering skills, including proficiency in a language such as Python and/or C/C++, and experience building reusable, well-architected code. - Experience developing test or automation software on Advantest 93K and/or Teradyne UltraFLEX platforms. - Strong written and verbal communication skills. - International travel required during release-to-production phases. PREFERRED QUALIFICATIONS - Master's degree in Electrical/Computer Engineering or Computer Science. - Demonstrated ability to lead cross-functional technical efforts and mentor other engineers. - Expertise in standard silicon security concerns for modem and SoC devices, such as secure boot, secure key and identity provisioning, fuse-based lifecycle management, and debug-port lockdown. - Experience implementing cryptographic provisioning flows involving keys, certificates, and device identities in a manufacturing or test environment. - Experience working with anti-tamper and physical security blocks in silicon, such as tamper detection, sensors, and secure-element hardening. - In-depth understanding of OTP/eFuse programming challenges, including margin, read-back verification, repeatability, and managing irreversible operations at high volume. - Strong software development background, with experience building reusable ATE libraries and tooling (pattern search, sub-flow generation, automated test-program generation). - Experience with digital test of complex SoCs, including developing, debugging, and analyzing coverage for scan/ATPG, MBIST, boundary scan (JTAG), and functional tests. - Experience developing and debugging test programs on ATE platforms such as Advantest 93K and Teradyne UltraFLEX. - Experience with high-speed SERDES test and characterization, including equalization test and tuning (CTLE/DFE/FFE), jitter decomposition, and eye/BER analysis. - Experience developing high-volume manufacturing test solutions and driving the full test release process across the New Product Introduction (NPI) lifecycle, from silicon bring-up, characterization, and qualification through production hand-off and ramp. - Familiarity with I/O protocols such as I3C, SPI, and GPIO. - Experience testing complex modem and SoC devices in advanced process nodes. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at . USA, CA, San Diego - 185 000.00 USD annually USA, CA, Sunnyvale - 213 500.00 USD annually USA, WA, Redmond - 185 000.00 USD annually

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role As a Senior ATE Security Engineer, you will engage with an experienced cross-disciplinary staff to deliver secure, high-quality custom silicon powering the Leo network. This role has two focuses: device security and provisioning during test, and the development of reusable ATE library and automation software that accelerates test development across the team. You will own secure device provisioning and security algorithm test on Advantest 93K and/or Teradyne UltraFLEX platforms, including secure key and identity injection, OTP/eFuse programming, and fuse-based lifecycle management. You will also design and build reusable, well-architected library code and tooling, such as pattern search utilities, automated sub-flow generation, and auto-generation of test programs from patterns, that improve the productivity, consistency, and quality of the entire test engineering team. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment, and you will influence design, DFT, security, and manufacturing teams to ensure our products are architected for security, testability, and cost-effective high-volume manufacturing. Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Own device security and secure provisioning during test, including secure boot, secure key and identity injection, cryptographic provisioning, fuse-based configuration and lifecycle management, and debug-port lockdown. • Develop, own, and qualify OTP/eFuse programming flows, addressing challenges such as programming margin, read-back verification, repeatability, and the irreversible nature of fuse operations across process, voltage, and temperature. • Integrate ATE flows with secure provisioning systems, HSMs, or key-management infrastructure. • Develop and validate JTAG and debug-access flows on post-provisioned units to enable debug of RMA returns and downstream quality issues, while preserving device security posture. • Design, build, and maintain reusable ATE library code and tooling that accelerates test development across the team. • Develop utilities for pattern search and analysis, automated sub-flow generation, and auto-generation of test programs from patterns. • Architect libraries and frameworks for reusability, maintainability, and scale, applying strong software engineering practices (modular design, version control, code review, and testing). • Run firmware on DUTs to enable secure provisioning, self-test, and reduced test time. • Partner with ASIC design, DFT, security, and firmware teams to ensure devices meet Amazon standards for secure provisioning, design-for-test, and design-for-manufacturability. • Actively identify security, test-readiness, and software gaps throughout the product lifecycle and drive them to resolution. • Lead technical and security reviews and set software and security best practices for the team. BASIC QUALIFICATIONS - Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent work experience - 7+ years of experience in silicon test, security engineering, or test software development. - Experience with device security and secure provisioning during test, including OTP/eFuse programming. - Working knowledge of the fundamentals of encryption, cryptographic keys, and secure communication channels. - Strong software engineering skills, including proficiency in a language such as Python and/or C/C++, and experience building reusable, well-architected code. - Experience developing test or automation software on Advantest 93K and/or Teradyne UltraFLEX platforms. - Strong written and verbal communication skills. - International travel required during release-to-production phases. PREFERRED QUALIFICATIONS - Master's degree in Electrical/Computer Engineering or Computer Science. - Demonstrated ability to lead cross-functional technical efforts and mentor other engineers. - Expertise in standard silicon security concerns for modem and SoC devices, such as secure boot, secure key and identity provisioning, fuse-based lifecycle management, and debug-port lockdown. - Experience implementing cryptographic provisioning flows involving keys, certificates, and device identities in a manufacturing or test environment. - Experience working with anti-tamper and physical security blocks in silicon, such as tamper detection, sensors, and secure-element hardening. - In-depth understanding of OTP/eFuse programming challenges, including margin, read-back verification, repeatability, and managing irreversible operations at high volume. - Strong software development background, with experience building reusable ATE libraries and tooling (pattern search, sub-flow generation, automated test-program generation). - Experience with digital test of complex SoCs, including developing, debugging, and analyzing coverage for scan/ATPG, MBIST, boundary scan (JTAG), and functional tests. - Experience developing and debugging test programs on ATE platforms such as Advantest 93K and Teradyne UltraFLEX. - Experience with high-speed SERDES test and characterization, including equalization test and tuning (CTLE/DFE/FFE), jitter decomposition, and eye/BER analysis. - Experience developing high-volume manufacturing test solutions and driving the full test release process across the New Product Introduction (NPI) lifecycle, from silicon bring-up, characterization, and qualification through production hand-off and ramp. - Familiarity with I/O protocols such as I3C, SPI, and GPIO. - Experience testing complex modem and SoC devices in advanced process nodes. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at . USA, CA, San Diego - 185 000.00 USD annually USA, CA, Sunnyvale - 213 500.00 USD annually USA, WA, Redmond - 185 000.00 USD annually

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role As a Senior ATE Security Engineer, you will engage with an experienced cross-disciplinary staff to deliver secure, high-quality custom silicon powering the Leo network. This role has two focuses: device security and provisioning during test, and the development of reusable ATE library and automation software that accelerates test development across the team. You will own secure device provisioning and security algorithm test on Advantest 93K and/or Teradyne UltraFLEX platforms, including secure key and identity injection, OTP/eFuse programming, and fuse-based lifecycle management. You will also design and build reusable, well-architected library code and tooling, such as pattern search utilities, automated sub-flow generation, and auto-generation of test programs from patterns, that improve the productivity, consistency, and quality of the entire test engineering team. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment, and you will influence design, DFT, security, and manufacturing teams to ensure our products are architected for security, testability, and cost-effective high-volume manufacturing. Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Own device security and secure provisioning during test, including secure boot, secure key and identity injection, cryptographic provisioning, fuse-based configuration and lifecycle management, and debug-port lockdown. • Develop, own, and qualify OTP/eFuse programming flows, addressing challenges such as programming margin, read-back verification, repeatability, and the irreversible nature of fuse operations across process, voltage, and temperature. • Integrate ATE flows with secure provisioning systems, HSMs, or key-management infrastructure. • Develop and validate JTAG and debug-access flows on post-provisioned units to enable debug of RMA returns and downstream quality issues, while preserving device security posture. • Design, build, and maintain reusable ATE library code and tooling that accelerates test development across the team. • Develop utilities for pattern search and analysis, automated sub-flow generation, and auto-generation of test programs from patterns. • Architect libraries and frameworks for reusability, maintainability, and scale, applying strong software engineering practices (modular design, version control, code review, and testing). • Run firmware on DUTs to enable secure provisioning, self-test, and reduced test time. • Partner with ASIC design, DFT, security, and firmware teams to ensure devices meet Amazon standards for secure provisioning, design-for-test, and design-for-manufacturability. • Actively identify security, test-readiness, and software gaps throughout the product lifecycle and drive them to resolution. • Lead technical and security reviews and set software and security best practices for the team. BASIC QUALIFICATIONS - Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent work experience - 7+ years of experience in silicon test, security engineering, or test software development. - Experience with device security and secure provisioning during test, including OTP/eFuse programming. - Working knowledge of the fundamentals of encryption, cryptographic keys, and secure communication channels. - Strong software engineering skills, including proficiency in a language such as Python and/or C/C++, and experience building reusable, well-architected code. - Experience developing test or automation software on Advantest 93K and/or Teradyne UltraFLEX platforms. - Strong written and verbal communication skills. - International travel required during release-to-production phases. PREFERRED QUALIFICATIONS - Master's degree in Electrical/Computer Engineering or Computer Science. - Demonstrated ability to lead cross-functional technical efforts and mentor other engineers. - Expertise in standard silicon security concerns for modem and SoC devices, such as secure boot, secure key and identity provisioning, fuse-based lifecycle management, and debug-port lockdown. - Experience implementing cryptographic provisioning flows involving keys, certificates, and device identities in a manufacturing or test environment. - Experience working with anti-tamper and physical security blocks in silicon, such as tamper detection, sensors, and secure-element hardening. - In-depth understanding of OTP/eFuse programming challenges, including margin, read-back verification, repeatability, and managing irreversible operations at high volume. - Strong software development background, with experience building reusable ATE libraries and tooling (pattern search, sub-flow generation, automated test-program generation). - Experience with digital test of complex SoCs, including developing, debugging, and analyzing coverage for scan/ATPG, MBIST, boundary scan (JTAG), and functional tests. - Experience developing and debugging test programs on ATE platforms such as Advantest 93K and Teradyne UltraFLEX. - Experience with high-speed SERDES test and characterization, including equalization test and tuning (CTLE/DFE/FFE), jitter decomposition, and eye/BER analysis. - Experience developing high-volume manufacturing test solutions and driving the full test release process across the New Product Introduction (NPI) lifecycle, from silicon bring-up, characterization, and qualification through production hand-off and ramp. - Familiarity with I/O protocols such as I3C, SPI, and GPIO. - Experience testing complex modem and SoC devices in advanced process nodes. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at . USA, CA, San Diego - 185 000.00 USD annually USA, CA, Sunnyvale - 213 500.00 USD annually USA, WA, Redmond - 185 000.00 USD annually

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role As a Senior ATE Security Engineer, you will engage with an experienced cross-disciplinary staff to deliver secure, high-quality custom silicon powering the Leo network. This role has two focuses: device security and provisioning during test, and the development of reusable ATE library and automation software that accelerates test development across the team. You will own secure device provisioning and security algorithm test on Advantest 93K and/or Teradyne UltraFLEX platforms, including secure key and identity injection, OTP/eFuse programming, and fuse-based lifecycle management. You will also design and build reusable, well-architected library code and tooling, such as pattern search utilities, automated sub-flow generation, and auto-generation of test programs from patterns, that improve the productivity, consistency, and quality of the entire test engineering team. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment, and you will influence design, DFT, security, and manufacturing teams to ensure our products are architected for security, testability, and cost-effective high-volume manufacturing. Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Own device security and secure provisioning during test, including secure boot, secure key and identity injection, cryptographic provisioning, fuse-based configuration and lifecycle management, and debug-port lockdown. • Develop, own, and qualify OTP/eFuse programming flows, addressing challenges such as programming margin, read-back verification, repeatability, and the irreversible nature of fuse operations across process, voltage, and temperature. • Integrate ATE flows with secure provisioning systems, HSMs, or key-management infrastructure. • Develop and validate JTAG and debug-access flows on post-provisioned units to enable debug of RMA returns and downstream quality issues, while preserving device security posture. • Design, build, and maintain reusable ATE library code and tooling that accelerates test development across the team. • Develop utilities for pattern search and analysis, automated sub-flow generation, and auto-generation of test programs from patterns. • Architect libraries and frameworks for reusability, maintainability, and scale, applying strong software engineering practices (modular design, version control, code review, and testing). • Run firmware on DUTs to enable secure provisioning, self-test, and reduced test time. • Partner with ASIC design, DFT, security, and firmware teams to ensure devices meet Amazon standards for secure provisioning, design-for-test, and design-for-manufacturability. • Actively identify security, test-readiness, and software gaps throughout the product lifecycle and drive them to resolution. • Lead technical and security reviews and set software and security best practices for the team. BASIC QUALIFICATIONS - Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent work experience - 7+ years of experience in silicon test, security engineering, or test software development. - Experience with device security and secure provisioning during test, including OTP/eFuse programming. - Working knowledge of the fundamentals of encryption, cryptographic keys, and secure communication channels. - Strong software engineering skills, including proficiency in a language such as Python and/or C/C++, and experience building reusable, well-architected code. - Experience developing test or automation software on Advantest 93K and/or Teradyne UltraFLEX platforms. - Strong written and verbal communication skills. - International travel required during release-to-production phases. PREFERRED QUALIFICATIONS - Master's degree in Electrical/Computer Engineering or Computer Science. - Demonstrated ability to lead cross-functional technical efforts and mentor other engineers. - Expertise in standard silicon security concerns for modem and SoC devices, such as secure boot, secure key and identity provisioning, fuse-based lifecycle management, and debug-port lockdown. - Experience implementing cryptographic provisioning flows involving keys, certificates, and device identities in a manufacturing or test environment. - Experience working with anti-tamper and physical security blocks in silicon, such as tamper detection, sensors, and secure-element hardening. - In-depth understanding of OTP/eFuse programming challenges, including margin, read-back verification, repeatability, and managing irreversible operations at high volume. - Strong software development background, with experience building reusable ATE libraries and tooling (pattern search, sub-flow generation, automated test-program generation). - Experience with digital test of complex SoCs, including developing, debugging, and analyzing coverage for scan/ATPG, MBIST, boundary scan (JTAG), and functional tests. - Experience developing and debugging test programs on ATE platforms such as Advantest 93K and Teradyne UltraFLEX. - Experience with high-speed SERDES test and characterization, including equalization test and tuning (CTLE/DFE/FFE), jitter decomposition, and eye/BER analysis. - Experience developing high-volume manufacturing test solutions and driving the full test release process across the New Product Introduction (NPI) lifecycle, from silicon bring-up, characterization, and qualification through production hand-off and ramp. - Familiarity with I/O protocols such as I3C, SPI, and GPIO. - Experience testing complex modem and SoC devices in advanced process nodes. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at . USA, CA, San Diego - 185 000.00 USD annually USA, CA, Sunnyvale - 213 500.00 USD annually USA, WA, Redmond - 185 000.00 USD annually

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role As a Senior ATE Security Engineer, you will engage with an experienced cross-disciplinary staff to deliver secure, high-quality custom silicon powering the Leo network. This role has two focuses: device security and provisioning during test, and the development of reusable ATE library and automation software that accelerates test development across the team. You will own secure device provisioning and security algorithm test on Advantest 93K and/or Teradyne UltraFLEX platforms, including secure key and identity injection, OTP/eFuse programming, and fuse-based lifecycle management. You will also design and build reusable, well-architected library code and tooling, such as pattern search utilities, automated sub-flow generation, and auto-generation of test programs from patterns, that improve the productivity, consistency, and quality of the entire test engineering team. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment, and you will influence design, DFT, security, and manufacturing teams to ensure our products are architected for security, testability, and cost-effective high-volume manufacturing. Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Own device security and secure provisioning during test, including secure boot, secure key and identity injection, cryptographic provisioning, fuse-based configuration and lifecycle management, and debug-port lockdown. • Develop, own, and qualify OTP/eFuse programming flows, addressing challenges such as programming margin, read-back verification, repeatability, and the irreversible nature of fuse operations across process, voltage, and temperature. • Integrate ATE flows with secure provisioning systems, HSMs, or key-management infrastructure. • Develop and validate JTAG and debug-access flows on post-provisioned units to enable debug of RMA returns and downstream quality issues, while preserving device security posture. • Design, build, and maintain reusable ATE library code and tooling that accelerates test development across the team. • Develop utilities for pattern search and analysis, automated sub-flow generation, and auto-generation of test programs from patterns. • Architect libraries and frameworks for reusability, maintainability, and scale, applying strong software engineering practices (modular design, version control, code review, and testing). • Run firmware on DUTs to enable secure provisioning, self-test, and reduced test time. • Partner with ASIC design, DFT, security, and firmware teams to ensure devices meet Amazon standards for secure provisioning, design-for-test, and design-for-manufacturability. • Actively identify security, test-readiness, and software gaps throughout the product lifecycle and drive them to resolution. • Lead technical and security reviews and set software and security best practices for the team. BASIC QUALIFICATIONS - Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent work experience - 7+ years of experience in silicon test, security engineering, or test software development. - Experience with device security and secure provisioning during test, including OTP/eFuse programming. - Working knowledge of the fundamentals of encryption, cryptographic keys, and secure communication channels. - Strong software engineering skills, including proficiency in a language such as Python and/or C/C++, and experience building reusable, well-architected code. - Experience developing test or automation software on Advantest 93K and/or Teradyne UltraFLEX platforms. - Strong written and verbal communication skills. - International travel required during release-to-production phases. PREFERRED QUALIFICATIONS - Master's degree in Electrical/Computer Engineering or Computer Science. - Demonstrated ability to lead cross-functional technical efforts and mentor other engineers. - Expertise in standard silicon security concerns for modem and SoC devices, such as secure boot, secure key and identity provisioning, fuse-based lifecycle management, and debug-port lockdown. - Experience implementing cryptographic provisioning flows involving keys, certificates, and device identities in a manufacturing or test environment. - Experience working with anti-tamper and physical security blocks in silicon, such as tamper detection, sensors, and secure-element hardening. - In-depth understanding of OTP/eFuse programming challenges, including margin, read-back verification, repeatability, and managing irreversible operations at high volume. - Strong software development background, with experience building reusable ATE libraries and tooling (pattern search, sub-flow generation, automated test-program generation). - Experience with digital test of complex SoCs, including developing, debugging, and analyzing coverage for scan/ATPG, MBIST, boundary scan (JTAG), and functional tests. - Experience developing and debugging test programs on ATE platforms such as Advantest 93K and Teradyne UltraFLEX. - Experience with high-speed SERDES test and characterization, including equalization test and tuning (CTLE/DFE/FFE), jitter decomposition, and eye/BER analysis. - Experience developing high-volume manufacturing test solutions and driving the full test release process across the New Product Introduction (NPI) lifecycle, from silicon bring-up, characterization, and qualification through production hand-off and ramp. - Familiarity with I/O protocols such as I3C, SPI, and GPIO. - Experience testing complex modem and SoC devices in advanced process nodes. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at . USA, CA, San Diego - 185 000.00 USD annually USA, CA, Sunnyvale - 213 500.00 USD annually USA, WA, Redmond - 185 000.00 USD annually

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role As a Senior ATE Security Engineer, you will engage with an experienced cross-disciplinary staff to deliver secure, high-quality custom silicon powering the Leo network. This role has two focuses: device security and provisioning during test, and the development of reusable ATE library and automation software that accelerates test development across the team. You will own secure device provisioning and security algorithm test on Advantest 93K and/or Teradyne UltraFLEX platforms, including secure key and identity injection, OTP/eFuse programming, and fuse-based lifecycle management. You will also design and build reusable, well-architected library code and tooling, such as pattern search utilities, automated sub-flow generation, and auto-generation of test programs from patterns, that improve the productivity, consistency, and quality of the entire test engineering team. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment, and you will influence design, DFT, security, and manufacturing teams to ensure our products are architected for security, testability, and cost-effective high-volume manufacturing. Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Own device security and secure provisioning during test, including secure boot, secure key and identity injection, cryptographic provisioning, fuse-based configuration and lifecycle management, and debug-port lockdown. • Develop, own, and qualify OTP/eFuse programming flows, addressing challenges such as programming margin, read-back verification, repeatability, and the irreversible nature of fuse operations across process, voltage, and temperature. • Integrate ATE flows with secure provisioning systems, HSMs, or key-management infrastructure. • Develop and validate JTAG and debug-access flows on post-provisioned units to enable debug of RMA returns and downstream quality issues, while preserving device security posture. • Design, build, and maintain reusable ATE library code and tooling that accelerates test development across the team. • Develop utilities for pattern search and analysis, automated sub-flow generation, and auto-generation of test programs from patterns. • Architect libraries and frameworks for reusability, maintainability, and scale, applying strong software engineering practices (modular design, version control, code review, and testing). • Run firmware on DUTs to enable secure provisioning, self-test, and reduced test time. • Partner with ASIC design, DFT, security, and firmware teams to ensure devices meet Amazon standards for secure provisioning, design-for-test, and design-for-manufacturability. • Actively identify security, test-readiness, and software gaps throughout the product lifecycle and drive them to resolution. • Lead technical and security reviews and set software and security best practices for the team. BASIC QUALIFICATIONS - Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent work experience - 7+ years of experience in silicon test, security engineering, or test software development. - Experience with device security and secure provisioning during test, including OTP/eFuse programming. - Working knowledge of the fundamentals of encryption, cryptographic keys, and secure communication channels. - Strong software engineering skills, including proficiency in a language such as Python and/or C/C++, and experience building reusable, well-architected code. - Experience developing test or automation software on Advantest 93K and/or Teradyne UltraFLEX platforms. - Strong written and verbal communication skills. - International travel required during release-to-production phases. PREFERRED QUALIFICATIONS - Master's degree in Electrical/Computer Engineering or Computer Science. - Demonstrated ability to lead cross-functional technical efforts and mentor other engineers. - Expertise in standard silicon security concerns for modem and SoC devices, such as secure boot, secure key and identity provisioning, fuse-based lifecycle management, and debug-port lockdown. - Experience implementing cryptographic provisioning flows involving keys, certificates, and device identities in a manufacturing or test environment. - Experience working with anti-tamper and physical security blocks in silicon, such as tamper detection, sensors, and secure-element hardening. - In-depth understanding of OTP/eFuse programming challenges, including margin, read-back verification, repeatability, and managing irreversible operations at high volume. - Strong software development background, with experience building reusable ATE libraries and tooling (pattern search, sub-flow generation, automated test-program generation). - Experience with digital test of complex SoCs, including developing, debugging, and analyzing coverage for scan/ATPG, MBIST, boundary scan (JTAG), and functional tests. - Experience developing and debugging test programs on ATE platforms such as Advantest 93K and Teradyne UltraFLEX. - Experience with high-speed SERDES test and characterization, including equalization test and tuning (CTLE/DFE/FFE), jitter decomposition, and eye/BER analysis. - Experience developing high-volume manufacturing test solutions and driving the full test release process across the New Product Introduction (NPI) lifecycle, from silicon bring-up, characterization, and qualification through production hand-off and ramp. - Familiarity with I/O protocols such as I3C, SPI, and GPIO. - Experience testing complex modem and SoC devices in advanced process nodes. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at . USA, CA, San Diego - 185 000.00 USD annually USA, CA, Sunnyvale - 213 500.00 USD annually USA, WA, Redmond - 185 000.00 USD annually

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role As a Senior ATE Security Engineer, you will engage with an experienced cross-disciplinary staff to deliver secure, high-quality custom silicon powering the Leo network. This role has two focuses: device security and provisioning during test, and the development of reusable ATE library and automation software that accelerates test development across the team. You will own secure device provisioning and security algorithm test on Advantest 93K and/or Teradyne UltraFLEX platforms, including secure key and identity injection, OTP/eFuse programming, and fuse-based lifecycle management. You will also design and build reusable, well-architected library code and tooling, such as pattern search utilities, automated sub-flow generation, and auto-generation of test programs from patterns, that improve the productivity, consistency, and quality of the entire test engineering team. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment, and you will influence design, DFT, security, and manufacturing teams to ensure our products are architected for security, testability, and cost-effective high-volume manufacturing. Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Own device security and secure provisioning during test, including secure boot, secure key and identity injection, cryptographic provisioning, fuse-based configuration and lifecycle management, and debug-port lockdown. • Develop, own, and qualify OTP/eFuse programming flows, addressing challenges such as programming margin, read-back verification, repeatability, and the irreversible nature of fuse operations across process, voltage, and temperature. • Integrate ATE flows with secure provisioning systems, HSMs, or key-management infrastructure. • Develop and validate JTAG and debug-access flows on post-provisioned units to enable debug of RMA returns and downstream quality issues, while preserving device security posture. • Design, build, and maintain reusable ATE library code and tooling that accelerates test development across the team. • Develop utilities for pattern search and analysis, automated sub-flow generation, and auto-generation of test programs from patterns. • Architect libraries and frameworks for reusability, maintainability, and scale, applying strong software engineering practices (modular design, version control, code review, and testing). • Run firmware on DUTs to enable secure provisioning, self-test, and reduced test time. • Partner with ASIC design, DFT, security, and firmware teams to ensure devices meet Amazon standards for secure provisioning, design-for-test, and design-for-manufacturability. • Actively identify security, test-readiness, and software gaps throughout the product lifecycle and drive them to resolution. • Lead technical and security reviews and set software and security best practices for the team. BASIC QUALIFICATIONS- Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent work experience - 7+ years of experience in silicon test, security engineering, or test software development. - Experience with device security and secure provisioning during test, including OTP/eFuse programming. - Working knowledge of the fundamentals of encryption, cryptographic keys, and secure communication channels. - Strong software engineering skills, including proficiency in a language such as Python and/or C/C++, and experience building reusable, well-architected code. - Experience developing test or automation software on Advantest 93K and/or Teradyne UltraFLEX platforms. - Strong written and verbal communication skills. - International travel required during release-to-production phases. PREFERRED QUALIFICATIONS- Master's degree in Electrical/Computer Engineering or Computer Science. - Demonstrated ability to lead cross-functional technical efforts and mentor other engineers. - Expertise in standard silicon security concerns for modem and SoC devices, such as secure boot, secure key and identity provisioning, fuse-based lifecycle management, and debug-port lockdown. - Experience implementing cryptographic provisioning flows involving keys, certificates, and device identities in a manufacturing or test environment. - Experience working with anti-tamper and physical security blocks in silicon, such as tamper detection, sensors, and secure-element hardening. - In-depth understanding of OTP/eFuse programming challenges, including margin, read-back verification, repeatability, and managing irreversible operations at high volume. - Strong software development background, with experience building reusable ATE libraries and tooling (pattern search, sub-flow generation, automated test-program generation). - Experience with digital test of complex SoCs, including developing, debugging, and analyzing coverage for scan/ATPG, MBIST, boundary scan (JTAG), and functional tests. - Experience developing and debugging test programs on ATE platforms such as Advantest 93K and Teradyne UltraFLEX. - Experience with high-speed SERDES test and characterization, including equalization test and tuning (CTLE/DFE/FFE), jitter decomposition, and eye/BER analysis. - Experience developing high-volume manufacturing test solutions and driving the full test release process across the New Product Introduction (NPI) lifecycle, from silicon bring-up, characterization, and qualification through production hand-off and ramp. - Familiarity with I/O protocols such as I3C, SPI, and GPIO. - Experience testing complex modem and SoC devices in advanced process nodes. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at . USA, CA, San Diego - 185 000.00 USD annually USA, CA, Sunnyvale - 213 500.00 USD annually USA, WA, Redmond - 185 000.00 USD annually

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role As a Senior ATE Security Engineer, you will engage with an experienced cross-disciplinary staff to deliver secure, high-quality custom silicon powering the Leo network. This role has two focuses: device security and provisioning during test, and the development of reusable ATE library and automation software that accelerates test development across the team. You will own secure device provisioning and security algorithm test on Advantest 93K and/or Teradyne UltraFLEX platforms, including secure key and identity injection, OTP/eFuse programming, and fuse-based lifecycle management. You will also design and build reusable, well-architected library code and tooling, such as pattern search utilities, automated sub-flow generation, and auto-generation of test programs from patterns, that improve the productivity, consistency, and quality of the entire test engineering team. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment, and you will influence design, DFT, security, and manufacturing teams to ensure our products are architected for security, testability, and cost-effective high-volume manufacturing. Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Own device security and secure provisioning during test, including secure boot, secure key and identity injection, cryptographic provisioning, fuse-based configuration and lifecycle management, and debug-port lockdown. • Develop, own, and qualify OTP/eFuse programming flows, addressing challenges such as programming margin, read-back verification, repeatability, and the irreversible nature of fuse operations across process, voltage, and temperature. • Integrate ATE flows with secure provisioning systems, HSMs, or key-management infrastructure. • Develop and validate JTAG and debug-access flows on post-provisioned units to enable debug of RMA returns and downstream quality issues, while preserving device security posture. • Design, build, and maintain reusable ATE library code and tooling that accelerates test development across the team. • Develop utilities for pattern search and analysis, automated sub-flow generation, and auto-generation of test programs from patterns. • Architect libraries and frameworks for reusability, maintainability, and scale, applying strong software engineering practices (modular design, version control, code review, and testing). • Run firmware on DUTs to enable secure provisioning, self-test, and reduced test time. • Partner with ASIC design, DFT, security, and firmware teams to ensure devices meet Amazon standards for secure provisioning, design-for-test, and design-for-manufacturability. • Actively identify security, test-readiness, and software gaps throughout the product lifecycle and drive them to resolution. • Lead technical and security reviews and set software and security best practices for the team. BASIC QUALIFICATIONS - Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent work experience - 7+ years of experience in silicon test, security engineering, or test software development. - Experience with device security and secure provisioning during test, including OTP/eFuse programming. - Working knowledge of the fundamentals of encryption, cryptographic keys, and secure communication channels. - Strong software engineering skills, including proficiency in a language such as Python and/or C/C++, and experience building reusable, well-architected code. - Experience developing test or automation software on Advantest 93K and/or Teradyne UltraFLEX platforms. - Strong written and verbal communication skills. - International travel required during release-to-production phases. PREFERRED QUALIFICATIONS - Master's degree in Electrical/Computer Engineering or Computer Science. - Demonstrated ability to lead cross-functional technical efforts and mentor other engineers. - Expertise in standard silicon security concerns for modem and SoC devices, such as secure boot, secure key and identity provisioning, fuse-based lifecycle management, and debug-port lockdown. - Experience implementing cryptographic provisioning flows involving keys, certificates, and device identities in a manufacturing or test environment. - Experience working with anti-tamper and physical security blocks in silicon, such as tamper detection, sensors, and secure-element hardening. - In-depth understanding of OTP/eFuse programming challenges, including margin, read-back verification, repeatability, and managing irreversible operations at high volume. - Strong software development background, with experience building reusable ATE libraries and tooling (pattern search, sub-flow generation, automated test-program generation). - Experience with digital test of complex SoCs, including developing, debugging, and analyzing coverage for scan/ATPG, MBIST, boundary scan (JTAG), and functional tests. - Experience developing and debugging test programs on ATE platforms such as Advantest 93K and Teradyne UltraFLEX. - Experience with high-speed SERDES test and characterization, including equalization test and tuning (CTLE/DFE/FFE), jitter decomposition, and eye/BER analysis. - Experience developing high-volume manufacturing test solutions and driving the full test release process across the New Product Introduction (NPI) lifecycle, from silicon bring-up, characterization, and qualification through production hand-off and ramp. - Familiarity with I/O protocols such as I3C, SPI, and GPIO. - Experience testing complex modem and SoC devices in advanced process nodes. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at . USA, CA, San Diego - 185 000.00 USD annually USA, CA, Sunnyvale - 213 500.00 USD annually USA, WA, Redmond - 185 000.00 USD annually

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role As a Senior ATE Security Engineer, you will engage with an experienced cross-disciplinary staff to deliver secure, high-quality custom silicon powering the Leo network. This role has two focuses: device security and provisioning during test, and the development of reusable ATE library and automation software that accelerates test development across the team. You will own secure device provisioning and security algorithm test on Advantest 93K and/or Teradyne UltraFLEX platforms, including secure key and identity injection, OTP/eFuse programming, and fuse-based lifecycle management. You will also design and build reusable, well-architected library code and tooling, such as pattern search utilities, automated sub-flow generation, and auto-generation of test programs from patterns, that improve the productivity, consistency, and quality of the entire test engineering team. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment, and you will influence design, DFT, security, and manufacturing teams to ensure our products are architected for security, testability, and cost-effective high-volume manufacturing. Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Own device security and secure provisioning during test, including secure boot, secure key and identity injection, cryptographic provisioning, fuse-based configuration and lifecycle management, and debug-port lockdown. • Develop, own, and qualify OTP/eFuse programming flows, addressing challenges such as programming margin, read-back verification, repeatability, and the irreversible nature of fuse operations across process, voltage, and temperature. • Integrate ATE flows with secure provisioning systems, HSMs, or key-management infrastructure. • Develop and validate JTAG and debug-access flows on post-provisioned units to enable debug of RMA returns and downstream quality issues, while preserving device security posture. • Design, build, and maintain reusable ATE library code and tooling that accelerates test development across the team. • Develop utilities for pattern search and analysis, automated sub-flow generation, and auto-generation of test programs from patterns. • Architect libraries and frameworks for reusability, maintainability, and scale, applying strong software engineering practices (modular design, version control, code review, and testing). • Run firmware on DUTs to enable secure provisioning, self-test, and reduced test time. • Partner with ASIC design, DFT, security, and firmware teams to ensure devices meet Amazon standards for secure provisioning, design-for-test, and design-for-manufacturability. • Actively identify security, test-readiness, and software gaps throughout the product lifecycle and drive them to resolution. • Lead technical and security reviews and set software and security best practices for the team. BASIC QUALIFICATIONS- Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent work experience - 7+ years of experience in silicon test, security engineering, or test software development. - Experience with device security and secure provisioning during test, including OTP/eFuse programming. - Working knowledge of the fundamentals of encryption, cryptographic keys, and secure communication channels. - Strong software engineering skills, including proficiency in a language such as Python and/or C/C++, and experience building reusable, well-architected code. - Experience developing test or automation software on Advantest 93K and/or Teradyne UltraFLEX platforms. - Strong written and verbal communication skills. - International travel required during release-to-production phases. PREFERRED QUALIFICATIONS- Master's degree in Electrical/Computer Engineering or Computer Science. - Demonstrated ability to lead cross-functional technical efforts and mentor other engineers. - Expertise in standard silicon security concerns for modem and SoC devices, such as secure boot, secure key and identity provisioning, fuse-based lifecycle management, and debug-port lockdown. - Experience implementing cryptographic provisioning flows involving keys, certificates, and device identities in a manufacturing or test environment. - Experience working with anti-tamper and physical security blocks in silicon, such as tamper detection, sensors, and secure-element hardening. - In-depth understanding of OTP/eFuse programming challenges, including margin, read-back verification, repeatability, and managing irreversible operations at high volume. - Strong software development background, with experience building reusable ATE libraries and tooling (pattern search, sub-flow generation, automated test-program generation). - Experience with digital test of complex SoCs, including developing, debugging, and analyzing coverage for scan/ATPG, MBIST, boundary scan (JTAG), and functional tests. - Experience developing and debugging test programs on ATE platforms such as Advantest 93K and Teradyne UltraFLEX. - Experience with high-speed SERDES test and characterization, including equalization test and tuning (CTLE/DFE/FFE), jitter decomposition, and eye/BER analysis. - Experience developing high-volume manufacturing test solutions and driving the full test release process across the New Product Introduction (NPI) lifecycle, from silicon bring-up, characterization, and qualification through production hand-off and ramp. - Familiarity with I/O protocols such as I3C, SPI, and GPIO. - Experience testing complex modem and SoC devices in advanced process nodes. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at . USA, CA, San Diego - 185 000.00 USD annually USA, CA, Sunnyvale - 213 500.00 USD annually USA, WA, Redmond - 185 000.00 USD annually

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role As a Senior ATE Security Engineer, you will engage with an experienced cross-disciplinary staff to deliver secure, high-quality custom silicon powering the Leo network. This role has two focuses: device security and provisioning during test, and the development of reusable ATE library and automation software that accelerates test development across the team. You will own secure device provisioning and security algorithm test on Advantest 93K and/or Teradyne UltraFLEX platforms, including secure key and identity injection, OTP/eFuse programming, and fuse-based lifecycle management. You will also design and build reusable, well-architected library code and tooling, such as pattern search utilities, automated sub-flow generation, and auto-generation of test programs from patterns, that improve the productivity, consistency, and quality of the entire test engineering team. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment, and you will influence design, DFT, security, and manufacturing teams to ensure our products are architected for security, testability, and cost-effective high-volume manufacturing. Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Own device security and secure provisioning during test, including secure boot, secure key and identity injection, cryptographic provisioning, fuse-based configuration and lifecycle management, and debug-port lockdown. • Develop, own, and qualify OTP/eFuse programming flows, addressing challenges such as programming margin, read-back verification, repeatability, and the irreversible nature of fuse operations across process, voltage, and temperature. • Integrate ATE flows with secure provisioning systems, HSMs, or key-management infrastructure. • Develop and validate JTAG and debug-access flows on post-provisioned units to enable debug of RMA returns and downstream quality issues, while preserving device security posture. • Design, build, and maintain reusable ATE library code and tooling that accelerates test development across the team. • Develop utilities for pattern search and analysis, automated sub-flow generation, and auto-generation of test programs from patterns. • Architect libraries and frameworks for reusability, maintainability, and scale, applying strong software engineering practices (modular design, version control, code review, and testing). • Run firmware on DUTs to enable secure provisioning, self-test, and reduced test time. • Partner with ASIC design, DFT, security, and firmware teams to ensure devices meet Amazon standards for secure provisioning, design-for-test, and design-for-manufacturability. • Actively identify security, test-readiness, and software gaps throughout the product lifecycle and drive them to resolution. • Lead technical and security reviews and set software and security best practices for the team. BASIC QUALIFICATIONS - Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent work experience - 7+ years of experience in silicon test, security engineering, or test software development. - Experience with device security and secure provisioning during test, including OTP/eFuse programming. - Working knowledge of the fundamentals of encryption, cryptographic keys, and secure communication channels. - Strong software engineering skills, including proficiency in a language such as Python and/or C/C++, and experience building reusable, well-architected code. - Experience developing test or automation software on Advantest 93K and/or Teradyne UltraFLEX platforms. - Strong written and verbal communication skills. - International travel required during release-to-production phases. PREFERRED QUALIFICATIONS - Master's degree in Electrical/Computer Engineering or Computer Science. - Demonstrated ability to lead cross-functional technical efforts and mentor other engineers. - Expertise in standard silicon security concerns for modem and SoC devices, such as secure boot, secure key and identity provisioning, fuse-based lifecycle management, and debug-port lockdown. - Experience implementing cryptographic provisioning flows involving keys, certificates, and device identities in a manufacturing or test environment. - Experience working with anti-tamper and physical security blocks in silicon, such as tamper detection, sensors, and secure-element hardening. - In-depth understanding of OTP/eFuse programming challenges, including margin, read-back verification, repeatability, and managing irreversible operations at high volume. - Strong software development background, with experience building reusable ATE libraries and tooling (pattern search, sub-flow generation, automated test-program generation). - Experience with digital test of complex SoCs, including developing, debugging, and analyzing coverage for scan/ATPG, MBIST, boundary scan (JTAG), and functional tests. - Experience developing and debugging test programs on ATE platforms such as Advantest 93K and Teradyne UltraFLEX. - Experience with high-speed SERDES test and characterization, including equalization test and tuning (CTLE/DFE/FFE), jitter decomposition, and eye/BER analysis. - Experience developing high-volume manufacturing test solutions and driving the full test release process across the New Product Introduction (NPI) lifecycle, from silicon bring-up, characterization, and qualification through production hand-off and ramp. - Familiarity with I/O protocols such as I3C, SPI, and GPIO. - Experience testing complex modem and SoC devices in advanced process nodes. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at . USA, CA, San Diego - 185 000.00 USD annually USA, CA, Sunnyvale - 213 500.00 USD annually USA, WA, Redmond - 185 000.00 USD annually

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role As a Senior ATE Security Engineer, you will engage with an experienced cross-disciplinary staff to deliver secure, high-quality custom silicon powering the Leo network. This role has two focuses: device security and provisioning during test, and the development of reusable ATE library and automation software that accelerates test development across the team. You will own secure device provisioning and security algorithm test on Advantest 93K and/or Teradyne UltraFLEX platforms, including secure key and identity injection, OTP/eFuse programming, and fuse-based lifecycle management. You will also design and build reusable, well-architected library code and tooling, such as pattern search utilities, automated sub-flow generation, and auto-generation of test programs from patterns, that improve the productivity, consistency, and quality of the entire test engineering team. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment, and you will influence design, DFT, security, and manufacturing teams to ensure our products are architected for security, testability, and cost-effective high-volume manufacturing. Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Own device security and secure provisioning during test, including secure boot, secure key and identity injection, cryptographic provisioning, fuse-based configuration and lifecycle management, and debug-port lockdown. • Develop, own, and qualify OTP/eFuse programming flows, addressing challenges such as programming margin, read-back verification, repeatability, and the irreversible nature of fuse operations across process, voltage, and temperature. • Integrate ATE flows with secure provisioning systems, HSMs, or key-management infrastructure. • Develop and validate JTAG and debug-access flows on post-provisioned units to enable debug of RMA returns and downstream quality issues, while preserving device security posture. • Design, build, and maintain reusable ATE library code and tooling that accelerates test development across the team. • Develop utilities for pattern search and analysis, automated sub-flow generation, and auto-generation of test programs from patterns. • Architect libraries and frameworks for reusability, maintainability, and scale, applying strong software engineering practices (modular design, version control, code review, and testing). • Run firmware on DUTs to enable secure provisioning, self-test, and reduced test time. • Partner with ASIC design, DFT, security, and firmware teams to ensure devices meet Amazon standards for secure provisioning, design-for-test, and design-for-manufacturability. • Actively identify security, test-readiness, and software gaps throughout the product lifecycle and drive them to resolution. • Lead technical and security reviews and set software and security best practices for the team. BASIC QUALIFICATIONS- Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent work experience - 7+ years of experience in silicon test, security engineering, or test software development. - Experience with device security and secure provisioning during test, including OTP/eFuse programming. - Working knowledge of the fundamentals of encryption, cryptographic keys, and secure communication channels. - Strong software engineering skills, including proficiency in a language such as Python and/or C/C++, and experience building reusable, well-architected code. - Experience developing test or automation software on Advantest 93K and/or Teradyne UltraFLEX platforms. - Strong written and verbal communication skills. - International travel required during release-to-production phases. PREFERRED QUALIFICATIONS- Master's degree in Electrical/Computer Engineering or Computer Science. - Demonstrated ability to lead cross-functional technical efforts and mentor other engineers. - Expertise in standard silicon security concerns for modem and SoC devices, such as secure boot, secure key and identity provisioning, fuse-based lifecycle management, and debug-port lockdown. - Experience implementing cryptographic provisioning flows involving keys, certificates, and device identities in a manufacturing or test environment. - Experience working with anti-tamper and physical security blocks in silicon, such as tamper detection, sensors, and secure-element hardening. - In-depth understanding of OTP/eFuse programming challenges, including margin, read-back verification, repeatability, and managing irreversible operations at high volume. - Strong software development background, with experience building reusable ATE libraries and tooling (pattern search, sub-flow generation, automated test-program generation). - Experience with digital test of complex SoCs, including developing, debugging, and analyzing coverage for scan/ATPG, MBIST, boundary scan (JTAG), and functional tests. - Experience developing and debugging test programs on ATE platforms such as Advantest 93K and Teradyne UltraFLEX. - Experience with high-speed SERDES test and characterization, including equalization test and tuning (CTLE/DFE/FFE), jitter decomposition, and eye/BER analysis. - Experience developing high-volume manufacturing test solutions and driving the full test release process across the New Product Introduction (NPI) lifecycle, from silicon bring-up, characterization, and qualification through production hand-off and ramp. - Familiarity with I/O protocols such as I3C, SPI, and GPIO. - Experience testing complex modem and SoC devices in advanced process nodes. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at . USA, CA, San Diego - 185 000.00 USD annually USA, CA, Sunnyvale - 213 500.00 USD annually USA, WA, Redmond - 185 000.00 USD annually

Job Description Job Description STR's Cyber Division is hiring a Senior Cyber RF Hardware Engineer who will leverage their RF, analog/mixed signal and system test skills to contribute to a multi-disciplinary team engaged in solving unique problems. The successful candidate will be comfortable designing, analyzing, and characterizing a variety of hardware architectures to aid with software and hardware modeling efforts. They should have a firm grasp of the fundamentals of RF system architecture to support both software and hardware reverse engineering tasks and be able to use their hardware expertise to rapidly test prototype solutions. We are seeking candidates with design experience to participate in the development of RF Hardware in the Loop (HWIL) systems, surrogate builds, digital twins, and hardware modeling support platforms that integrate a variety of electrical subsystems, ranging from commercial off-the-shelf (COTS) components to custom-designed boards. The successful candidate will contribute to the design process of a growing hardware team by participating in design reviews with comprehensive design documentation, building and executing automated test suites, and collaborating to ensure quality outputs and support for future design re-use. What you will do: Develop rapid prototype RF solutions to go from free space to bits using a combination of COTS and custom designs Work in a laboratory environment utilizing test equipment (oscilloscopes, spectrum analyzers, VNAs etc.) to characterize and debug complex electronic systems Prepare and execute test events for customers and internal and external stakeholders Lead efforts to develop lab-based acquisition and control platforms to aid in test and characterization of hardware systems Serve as the hardware team representative on interdisciplinary efforts to contribute knowledge of system architecture and focused processor implementations Participate in proposal efforts by providing input on technical path and BOM/cost and schedule estimates Who you are: This position requires the ability to obtain a Top Secret (TS) security clearance , for which U.S. citizenship is needed by U.S. Government BS in Computer Science, Electrical Engineering, or related field with 5 years of related experience OR a MS and 3 years Proven expertise of electrical circuit design principles in at least one of the following areas: RF, analog, or digital Strong problem-solving skills and willingness to mentor junior engineering staff Experience preparing and presenting technical material to customers and internal staff Experience leading hardware efforts from concept to implementation managing cost and scheduling requirements Nice to Haves: Active Top Secret (TS) Security Clearance Strong RF design or implementation background with experience in system analysis and component characterization Experience with FPGA forward and reverse engineering processes and methodology Experience with RF electromagnetics theory, antenna modeling, and link budget analysis for OTA testing Experience integrating and working with software defined radios and RFSOC platforms Experience developing PCB-based designs and implementing FPGA and embedded software to support HWIL and surrogate designs Experience with Analog and RF circuit simulation and modeling tools (e.g., Spice, MATLAB/Simulink, Microwave Office) Experience in DSP or other signal processing skills Experience using and developing tools and test software for Linux (e.g., Red Hat, Ubuntu) Software development in support of RF systems testing with a variety of tools/packages in MATLAB, Python, or C++ Knowledge of PCB design and fabrication principles and familiarity with industry standard CAD tools (e.g., Cadence, Altium, Eagle) Digital/FPGA HDL experience using dedicated design tools (e.g., Vivado, Quartus, Simulink/HDL Coder) Pay Information Full-Time Salary Range: $134,000 - $184,000 The salary range listed is based on external market data. Final offers are based on factors, such as but not limited to, the candidate's experience, education, training, key skills/critical skills, security clearances, and prevailing market and business conditions. STR is a growing technology company with locations near Boston, MA, Arlington, VA, near Dayton, OH, Melbourne, FL, Carlsbad, CA, Atlanta, GA, and Denver, CO. We specialize in advanced research and development for defense, intelligence, and national security in: cyber; next generation sensors, radar, sonar, communications, and electronic warfare; and artificial intelligence algorithms and analytics to make sense of the complexity that is exploding around us. STR is committed to creating a collaborative learning environment that supports deep technical understanding and recognizes the contributions and achievements of all team members. Our work is challenging, and we go home at night knowing that we pushed the envelope of technology and made the world safer. STR is not just any company. Our people, culture, and attitude along with their unique set of skills, experiences, and perspectives put us on a trajectory to change the world. We can't do it alone, though - we need fellow trailblazers. If you are one, join our team and help to keep our society safe! Visit us at for more info. STR is an equal opportunity employer. We are fully dedicated to hiring the most qualified candidate regardless of race, color, religion, sex (including gender identity, sexual orientation and pregnancy), marital status, national origin, age, veteran status, disability, genetic information or any other characteristic protected by federal, state or local laws. If you need a reasonable accommodation for any portion of the employment process, email us at and provide your contact info. Pursuant to applicable federal law and regulations, positions at STR require employees to obtain national security clearances and satisfy the requirements for compliance with export control and other applicable laws.

Job Description Job Description Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, enabling differentiated system-on-chip (SoC) solutions. Our technology fuels innovation in critical applications ranging from 5G, wireline and optical communications, LiDAR, radar, automotive networking, AI, and image sensors. With a proven track record of exceeding 50% year-over-year growth, we are at an inflection point, poised to significantly expand our market share and solidify our position as a technology leader. Role Overview This is a lead role with full ownership of high-speed evaluation boards from start to finish - from initial specification and design through schematic capture, layout, bring-up, characterization, and debug. The role has a strong lab focus , with responsibility for driving high-speed measurement and validation on the bench, including work with BERTs and high-speed oscilloscopes. You will set the technical direction for our test board hardware and partner with analog, digital, and test automation teams to define next-generation evaluation platforms. Work Model: Hybrid - on-site lab/bench work combined with remote flexibility. Key Responsibilities Full Board Ownership: Lead and take full ownership of high-speed/RF boards from specification through design, schematic capture, PCB layout, BOM, bring-up, test, and debug. RF Signal Path Design: Design RF signal paths with careful attention to impedance matching, microstrip/stripline routing, connector selection, and launch structures for operation up to 64 GHz. Power Delivery: Design low-noise power delivery networks using LDO regulators appropriate for sensitive analog and RF measurement environments. Converter Characterization: Characterize high-speed ADC and DAC devices, including SNDR, SFDR, THD, and dynamic range measurements. Signal Integrity: Measure and interpret S-parameters to validate board signal integrity and RF performance across the full frequency range. High-Speed Lab Validation: Lead high-speed measurement and validation on the bench, including BERT bit-error-rate testing, eye-diagram/jitter analysis, and high-speed oscilloscope characterization. Digital Integration: Integrate FPGA or microcontroller subsystems on test boards to enable automated stimulus, data capture, and instrument control. Cross-Functional Collaboration: Work closely with analog, digital, and test automation engineers to define specifications for next-generation evaluation boards. Documentation: Clearly and thoroughly document board designs, test procedures, and characterization results. Required Qualifications B.S. or M.S. in Electrical Engineering or a related field 5+ years of hands-on PCB design and hardware bring-up experience Demonstrated experience characterizing high-speed ADC or DAC devices High-speed/RF PCB design experience, including controlled impedance, grounding, shielding, and high-frequency connector and launch design Proficiency designing high-speed/RF schematics and layouts using industry-standard EDA tools Strong working knowledge of S-parameters and VNA measurement techniques Experience with low-noise LDO selection and power supply layout best practices for analog/RF environments Experience with SERDES and the JESD204B high-speed serial interface in an ADC/DAC evaluation environment Hands-on proficiency with BERTs, high-speed oscilloscopes, VNAs, spectrum analyzers, and signal generators Desirable Qualifications FPGA development experience, including RTL design, embedded firmware, or board-level integration Microcontroller (MCU) integration on test boards for stimulus, data capture, and instrument control Python scripting for test automation, instrument control (VISA/PyVISA), and data analysis Experience designing or characterizing boards at mmWave frequencies above 30 GHz Familiarity with JESD204C or other emerging high-speed converter interface standards Familiarity with high-speed SERDES at 224G Experience with high-speed lab testing, including BERT, high-speed oscilloscopes, eye/jitter analysis, and bit-error-rate measurements Ability to test ADC and DAC devices and clearly present product performance to technical and cross-functional audiences Experience in a fabless semiconductor or IC design environment Key Skills at a Glance Required PCB design - 5+ years Board bring-up and debug High-speed lab testing - BERT, oscilloscope, eye/jitter, BER RF design up to 64 GHz S-parameters and VNA ADC/DAC characterization Low-noise LDO design JESD204B SERDES Desirable Python test automation ADC/DAC performance reporting and presentation FPGA development MCU integration mmWave (>30 GHz) JESD204C 224G SERDES We are looking for trailblazers We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Omni Design's IP cores and Automation. In the rapidly emerging semiconductor embedded design business ecosystem. At Omni Design, we have created an exciting environment with amazing talent across multiple disciplines. We like self-motivated individuals, we encourage initiative, we look for leadership qualities, we value teamwork, we like diversity, and we reward excellence. We are looking for trailblazers to bring Omni Design's vision to fruition. If you are interested in making an impact as part of a young, fast-growing, cutting-edge technology company, please reach out to us. Omni Design is an equal opportunity employer. We offer excellent compensation. We seek individuals that share our high standards and commitment to excellence. Omni Design Technology is proud to be an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex (including pregnancy, gender identity, and sexual orientation), national origin, age, disability, veteran status or other legally protected characteristics. If you require assistance or an accommodation due to a disability in order to apply for a position, please contact us at . Omni Design Technology participates in E-Verify. For positions located in the United States, employment is contingent upon verification of identity and eligibility to work in the United States. Background checks may be required as part of the hiring process. We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.

Job Description Job Description About Humble Robotics Working at Humble Robotics means taking on the biggest change in ground transportation in decades. We're building an autonomous, zero-emissions hauler that dramatically lowers the cost of freight with groundbreaking vision-based AI, designed for today's global logistics network. We're a fast-moving, close-knit team of AV industry veterans and innovative thinkers. We don't believe culture can be engineered - but when it falls into place, it's a once-in-a-lifetime adventure. Progress has never felt so present. Position Overview Own and support the sensors on our next-generation autonomous trucks, from selection and characterization through placement, commissioning, and on-vehicle validation. You will define what "good" means for every camera, lidar, radar, microphone, and INS on the truck, prove it in the lab and in the field, and be the person Perception and Autonomy come to when sensor data does not look right. Key Responsibilities Write and own sensor requirements. Make them testable, tie each one to an autonomy or safety need, and defend the rationale in cross-functional reviews. Run field of view, coverage, and occlusion studies for a Class 8 tractor-trailer. Quantify blind zones, cross-modality overlap, and trailer articulation effects, and use that analysis to drive sensor placement decisions. Characterize remote-sensing systems, including camera, lidar, radar, microphone, IMU, and GNSS: resolution, SNR, dynamic range, latency and jitter, point density, range and reflectivity, detection and false alarm rates, angular accuracy, bias and drift. Own sensor commissioning and bring-up, including procedures, automation, qualification tests, diagnostics, and drive improvements for repeatability and throughput. Design and build test setups and test benches. Experience with measurement tools, power supplies, t-slot rail, power distribution, and bracket design preferred. Support testing, evaluation, federation, and continued operation of vehicles, sensors, and vehicle platforms. Support data collection, automation, review, and analysis for bench and on-vehicle tests, for characterization, failure analysis, reliability estimation, systems analysis, and performance modeling. Work directly with Autonomy and Software to turn perception needs into measurable sensor KPIs, and with Hardware on mounts, enclosures, harnessing, power, thermal, and networking. Lead root cause analysis on sensor issues from bring-up, DV, and on-vehicle operation, and close the loop into specs and design changes. Minimum Qualifications BS in Electrical Engineering, Mechanical Engineering, Physics, or related, and 3 or more years of hands-on sensor and engineering experience. Test automation, scripting, and data analysis experience. Field of view and coverage analysis experience, including geometric modeling of sensor placement on a vehicle or robot. Experience with at least two of camera, lidar, radar, or INS/GNSS. Strong grasp of the underlying physics: optics and photometry, lidar range equation and reflectivity, radar RCS and antenna patterns, inertial error models and GNSS/INS fusion behavior. Proven cross-functional collaboration with autonomy, perception, software, and hardware teams. Fluent in Python for test automation and data analysis. Comfortable on a vehicle and in the shop Experience writing test reports and procedures someone else can execute. Preferred Qualifications Prior experience at an AV, robotaxi, autonomous trucking, or ADAS program at an OEM or Tier 1. Commissioned sensor suites across multiple vehicle builds or program phases. Took a sensor from evaluation through supplier qualification onto a production vehicle. Heavy-duty truck or large articulated platform experience. Working knowledge of, GMSL, Automotive Ethernet, CAN/CAN FD, and PTP. Sensor modeling or simulation for placement trade studies. Exposure to functional safety and SOTIF as applied to sensor performance and degradation. Compensation Salary ranges are determined by role, level, and location. Within the range, individual pay is determined by additional factors, including qualifications, skills, experience, and location. We also offer competitive equity compensation and benefits. As part of the interview process, we may use Artificial Intelligence (AI) tools to compare your qualifications and experience to the job description. A human reviews all AI output and makes a final hiring decision. Humble Robotics does not rely on the output to make any employment decisions. Some applicants may have a legal right to opt-out of the use of AI as part of our interview process. Contact to exercise this right or if you have further questions on the use of AI tools in our hiring process. Humble Robotics is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, national origin, gender, age, religion, disability, sexual orientation, veteran status, marital status or any other characteristics protected by law. Humble Robotics will consider qualified applicants with arrest and conviction records in a manner consistent with local ordinances. We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.

Job Description Job Description Perception Hardware Integration Engineer Location: El Segundo / Los Angeles, CA (On site, 5 days/week) Travel: Bi weekly desert flight tests in Mojave, CA Compensation: $180,000-$220,000 base + competitive equity Work Authorization: US Citizen or Green Card required About the Company We are a fast growing, venture backed defense technology startup addressing America's interceptor missile production shortage. With $30M raised across pre seed and seed rounds, our team designs, builds, and flight tests real missile hardware on an aggressive two week cadence. To date, we've completed 20+ rocket flight tests , operating with the speed and execution of a modern hardware startup. Role Overview As a Perception Hardware Integration Engineer , you will own the full lifecycle of our missile seeker electro optical hardware system-from benchtop prototype to high volume production. You will integrate sensors, optics, compute modules, and thermal imaging units into flight ready seeker packages, ensuring precise calibration and readiness for rapid test cycles. This role is highly hands on, fast paced, and ideal for engineers who thrive in hardware intensive environments with continuous iteration and real flight testing. Key Responsibilities Own the seeker hardware system across prototype development, integration, testing, and production scaling. Assemble and integrate optical sensors, LWIR/MWIR thermal imaging units, compute boards, custom optics, IMUs, and wiring harnesses into complete seeker packages. Perform advanced calibration , including NUC, radiometric calibration, bad pixel mapping, and boresight alignment across multiple seeker systems in parallel. Participate in bi weekly flight tests in Mojave, analyzing flight data and driving rapid mechanical/optical redesign cycles. Collaborate with cross functional engineering teams to ensure environmental qualification, reliability, and production readiness. Required Qualifications 8-15 years of hands on integration experience with electro optical systems, thermal imaging (LWIR/MWIR), or defense sensor hardware. Demonstrated ability to take optical hardware from CAD (Siemens NX) through prototype build, environmental qualification, and flight test. Proficiency in Python for test automation and hardware bring up. Comfortable working on site in El Segundo/Los Angeles with regular desert travel. US Citizen or Green Card (no visa sponsorship). Technical Environment Electro optical cameras, custom optics, compute modules, IMUs, power distribution Siemens NX (CAD), GD&T LWIR/MWIR thermal imaging NUC, radiometric calibration, boresight alignment Test automation, FPA characterization